Part Number: LMK00304 Other Parts Discussed in Thread: LMK00338 , LMK00334 , LMKDB1104 Hello,
I am working on a PCIE clock distribution design for our new network switch board. I have the following requirements: - common clock design - support a mix…
Part Number: LMK00304 When using the LMK00304 chip to output three 100MHz differential clocks, after measurement, the duty cycle of all output clocks has reached 60%. What is the reason for this? Is there any way to adjust the duty cycle to 50%?
The…
Part Number: LMX2595 Other Parts Discussed in Thread: LMK00304 , , LMX2572 Hi I want to use LMK00304 as an input buffer to two numbers of LMX2595 and to LMX2572 to feed LVDS differential Signal and i have few questions:
1) What is the maximum differential…
Part Number: LMK00304 Hello expert,
Do we have the spec like other vendor as below? We only found the spec in datasheet like below. We would like to know the value for input high/low threshold for both maximum and minimum. Thanks a lot!
Part Number: ADC12QJ1600EVM Other Parts Discussed in Thread: LMK04828 , LMK00304 , I see in the user manual there are four possible options for clocking the ADC and FPGA together. I'm looking into option 1 "EXT CLK from LMK to ADC" (Default). It looks…
Part Number: LMK00304 Other Parts Discussed in Thread: LMK00301 Hi team,
The customer's current project involves the use of the LMK00304 clock buffer. The circuit design is shown in Figure 1. During testing, it was discovered that the input clock swing…
Part Number: LMK00304 Other Parts Discussed in Thread: LMK00105 , LMK04832 Hello team,
I have a question about LMK00304 and LMK00105. Could you answer below two cases?
Regarding OSCin and CLKOUT of LMK00304 and LMK00105, What will be output on CLKOUT…
Part Number: LMK00304 Dear team,
I would like to double confirm input range spec in datasheet with you.
Based on datasheet, Vss=2*VID=1.3*2=2.6V.
But VIHD=VCC and VILD is GND, for our application(VCC=3.3V), the delta-V is 3.3V in this case.
…
Part Number: LMK00304 Hi experts,
I'm using LMK00304 in my design. there are two parts in my board, both inputs are driven by two outputs of a PLL with the same frequency and same phase, the frequency is 100MHz, I want to calculate the propagation delay…
