Part Number: LMK00334-Q1 Tool/software: Hi, Can you tell me what the V differential peak to peak min and max output amplitudes is for the LMK00334-Q1? I have a unique application and need to know the worse case V differential peak to peak min and max…
Part Number: LMK00334-Q1 To whom it may concern
We have created a schematics of LMK00334-Q1 and request to review schematics of LMK00334-Q1. We cannot share the public TI Forum and with to discuss in local. Please introduce application engineer or reviewer…
Part Number: LMK00334-Q1 Hi,
There are a couple of questions.
Customer is using only CLKin0 and CLKin0*
1. At CLKin0: toggle, CLKin0*, CLKout0 is toggled signal and CLKout0* is Hi-Z. Is it correct?
2. page 16 of datasheet
Is LMK input in figure…
Part Number: LMK00334-Q1 Hi team,
LMK00334-Q1 doesn’t have an option to adjust drive strength at the CLK outputs, right?
Is there a way to increase the drive strength?
Thanks,
Sam Lee
Part Number: LMK00334-Q1 Hi Team,
My customer is looking for 2~3ch Clock buffer with TCXO input ( 52Mhz, Clipped Sinewave) for their system.
it is Automotive application.
Please check the LMK00334-Q1 with this spec and recommend other device if…
Part Number: LMK00334-Q1 Hi team,
According to the datasheet, min value of Voh is 520mV, which is a little smaller than customer required.
There should be a 15mA current in the driver stage of HCSL output, which means there should be 15mA*50ohm…
Part Number: LMK00334-Q1
Hello Team,
Can you share with us the dimension of the thermal pad? It seems that the datasheet is missing this information.
Regards,
Renan
Part Number: LMK00334-Q1 Hi Team,
Can you please share the recommended LMK00334-Q1 CLKin termination components for a LP-HCSL PCIe Gen5 input clock?
Thanks,
Antonio
Part Number: LMK00334-Q1 Hello team,
My customer is considering LMK00334-Q1.
the customer wants to use only bank A output not using Bank B.
Could you please tell me VCCOB is not needed to connect to power line at customer use case?
and also…
Part Number: LMK00334-Q1 Hi,
Do you have figures for additive RMS phase jitter for the LMK00334-Q1 with the PCIe Gen 2 high band (1.5MHz - Nyquist) and low band (10kHz-1.5MHz) filters applied?
Thanks,
Jack