Because of the Thanksgiving holiday in the U.S., TI E2E™ design support forum responses may be delayed from November 25 through December 2. Thank you for your patience.
Hello Shay,
Sorry for the late reply. Yes, the 150ps also applies to 120MHz input.
shay maoz said: any relation between the clock input period to the delay adjustment?
Yes, they are related to the input clock + a 400ps delay. The extra delay comes from…
Hello Sakthi,
That decision is up tp you. The 2102 has two inputs and two outputs, so you would use one input that feeds into both outputs. The 1204 has one input and 4 outputs, so you could just leave the unused outputs floating.
Best,
Andrea
Part Number: LMK01000 Hello E2E Experts,
Good day.
1. May I ask what are the differences between different VCC names? VCC1, VCC2..., etc.
2. Is it internally connected?
3. What is the reason behind many bypass capacitors for each Vcc pin?
Regards,
CS…
Part Number: LMK01000 Good Morning I am using Clock buffer LMK01000 for LVDS clock generation. Currently I am using single channel for testing. After programming, the clock buffer is able to generate the required clock but issue has come up during integration…
Part Number: LMK01000 Hi all,
From the datasheet,the relationship of them is as follow:
But when i test the LMK01000 DEMO,the Fclkin=1474.56M and the divider is set to 4,it also works.
So which one is correct?
Part Number: LMK01000 Other Parts Discussed in Thread: LMK01801 Hello,
I am looking for a part to do SE-to-LVDS translation with ultra-low skew. Our dedicated LVDS drivers couldn't reach the accuracy we need, so we are considering clock buffers for this…
Part Number: LMK01000 In the "CLKout DELAYS" section of the LMK01000 datasheet it states "When the delay is enabled it adds to the output noise floor". The same section states "Refer to the Typical Performance Characteristics plots…
Part Number: LMK01000 Is there any data showing the additive jitter with a 50 MHz input and a 50 MHz LVPECL output (divider and delay bypassed)?
Lowest frequency shown in data sheet is 200 MHz output and footnote suggests there may be characterization…
Hi,
We do not have a solution that meets all your requirements. The closest thing I can recommend is the LMK01000 which can accept single ended inputs and has 3 LVDS and 5 LVPECL outputs, although at a higher jitter (LVPECL @ 200 MHz 100Hz-20MHz is 65fs…
Part Number: LMK01000 Other Parts Discussed in Thread: LMK01801 , hi dear supporting team,
is LMK01000 support lower than 100KHz input? my customer need a clock buffer with delay adjustment function , need 2 outpus, and need support input frequency lower…
