Other Parts Discussed in Thread: LMK04100 , LMK00301 Hello,
I need an ultra low skew clock distribution scheme :
1 to 36 @300MHz
clock skew between any 2 clock paths : < 20 ps
I checked some parts form TI, and found that the propagation delay between…
Hi Noel,
There is another problem about clock, there are two different frequecy of output? the frequency of one output is 10MHz and another is 100MHz, and fhe frequency of the reference and external VCXO are 10MHz, which chip can be used to realized the…
Hello Ron,
Sorry for your trouble.
Two issues are going on here.
1) The LMK0482x profiles for the CDT does not support the SYSREF divider. So the max divide is 32 which doesn't allow it to find 19.2 MHz.
- A workaround is to put a multiple of this…
Hi Team,
Could you please provide me the LMK04000EVM and LMK04100EVM schematic ?
I could not read the numbers and words in both User's guide.
LMK04000EVM User's Guide : schematic is too low resolution LMK04100EVM User's Guide : numbers disappe…