Other Parts Discussed in Thread: CDCM7005 , LMK04110 , CDCE62005 , CDCM6208 Please let me know recommended clock solution.
※Jitter cleaner input are LVDS or LVPECL.
Clock generator output is LVDS.
・I think that jitter cleaner is CDCM7005…
What are you phase noise or jitter requirements with integration bandwidth?
Based on the…
Sorry for your trouble.
Two issues are going on here.
1) The LMK0482x profiles for the CDT does not support the SYSREF divider. So the max divide is 32 which doesn't allow it to find 19.2 MHz.
- A workaround is to put a multiple of this…