Other Parts Discussed in Thread: LMK04133 , LMK04906 Hi, I am planning to use LMK04133 in one of my video project. For one of the video format clock generation, PLL2 phase detector frequency is comming to 43KHz. Can somebody please tell me the peak-to-peak…
Other Parts Discussed in Thread: LMK04133 , LMK04033 Hi,
I would choose Clock & Timers devices.
So,I don't find differences in characteristics between LMK04033 and LMK04133.
I would like to have your responce.
Kato / Japan disty
Other Parts Discussed in Thread: SN74S124 , CLOCK-TREE-ARCHITECT , LMK61E2 , LMX2571 , LMX2572 , LMK04133 Hi
While searching for a VCO with output frequency as 27MHz , I found the part number SN74S124 . But the datasheet doesn't have any formula to determine…
Depends on reference performance and ADC/DAC clock jitter requirements.
If reference is noisy (from FPGA or recovered from PHY/SerDes), we need dual PLL jitter cleaner LMK04133 (5 pairs of outputs)/ LMK04803 (12 pairs of outputs)/LMK04828 (14 pairs of…
Part Number: LMK04131 Other Parts Discussed in Thread: LMK04133 Hi
I have a question regarding the clock inputs to the lmk04131.
I do not know how to choose the values of the VCXO connected to the OSCin and the VCO connected to the reference clock CLKin0…
Part Number: CDCLVP1102 Other Parts Discussed in Thread: LMK03806 , LMK04133 Hi,
I have a image sensor which requires a differential clock of 400Mhz
the clock to the sensor comes from a different fpga board which is connected through a 5 inch flex ca…
Other Parts Discussed in Thread: LMK04100 , LMK04133 Hi,all
Let me ask you a question about LMK04XXX.
・According to datasheet P1 , LMK04XXX acccepts a differential input , however is it able to accept single input ?
・I think that LMK04XXX can operate with…
Sorry for your trouble.
Two issues are going on here.
1) The LMK0482x profiles for the CDT does not support the SYSREF divider. So the max divide is 32 which doesn't allow it to find 19.2 MHz.
- A workaround is to put a multiple of this…