Part Number: LMK04826BEVM Tool/software: Hello Everyone,
I 'm trying to ouptut severals clock from the LMK04826B evaluation board. i have setup a configuration using TICSPRO software.
Following the programming sequence in section 9.5.1 from datasheet…
Part Number: LMK04826BEVM Other Parts Discussed in Thread: LMK04826 hi team,
the customer wants to use PLL1 to drive a 5V OCXO. can you please provide the technical reason why they cannot use 5V for the pin 36?
Thanks,
Kevin
Part Number: LMK04826BEVM Other Parts Discussed in Thread: LMK04826 , LMK04832 , LMK04828 , PLLATINUMSIM-SW hello
we are using LMK04826B in one of our application. so i want to configure the LMK by giving 100MHz external source to oscin .
1). I tired…
Part Number: LMK04826BEVM Hello team,
Would you please provide with the Gerber Data of LMK04826BEVM?
The customer would like to use it to desitgn their own board.
Your support would be so appreciated.
Best Regards,
Akihisa Tamazaki
Part Number: LMK04826BEVM Other Parts Discussed in Thread: LMK04826 We have purchased evaluation (LMK04826BEVM) Board for internal testing purpose .
We have following quires
1) We are getting outputs without feeding clock input ( Isolated on board…
Part Number: LMK04826BEVM Other Parts Discussed in Thread: LMK04826 Hi,
First, I have replaced VCXO with 120MHz one with Crystek CVHD-950 VCXO from 122.88MHz mount and it worked very well showing ~130fsec at 192MHz output. Now, I have replaced VCXO…
Part Number: LMK04826BEVM Hello Team,
is it possible to apply an external reference clock at CLKin1 which is NOT 122.88MHz as described in the user's guide, please?
Are there any HW changes required on the EVM?
How to disable the on board VCXO,…
Hi Juan,
LMK0482x family is dual PLL jitter cleaner, when PLLs locked, frequency offset ppm value would be the same for CLKin, OSCin, and CLKout.
For example, CLKin is a +/- 50 ppm XO, then VCXO also would locked on +/-50 ppm, final CLKout also is …
Part Number: LMK04826BEVM Other Parts Discussed in Thread: LMK04826 Hello
I want to generate 6 pairs of device clock and sysref. I need help to setup the device, can somebody help me?
Thanks, kk
Other Parts Discussed in Thread: CODELOADER Hello Brian Wang,
In my last post (http://e2e.ti.com/support/clocks/f/48/t/336993.aspx) you had explained on how to achieve lock on PLL2. I have followed the steps but sometimes not able to lock on PLL2. I…
