• LMK04828: Technical problems of LMK04828

  

  Zhonghui Xu

  Part Number: LMK04828 Other Parts Discussed in Thread: LMK04832 Hi team, I got question from customer. DCLK channel output of LVPECL 1600 format waveform, the output of the actual waveform swing is only more than 100 mV. Please help with the analysis…

  • 20 days ago
  • Clock & timing
  • Clock & timing forum

• LMK04828: MULTI-LMK04828 SPI ISSUE

  

  Qiang Ren

  Part Number: LMK04828 Hello team, We're using 1 FPGA to driver 3 LMK04828 by 4-wire SPI, note that the CS pin is seperated but the other SPI pins are sharing line. For the pin configuration, 0x149 is set to be 0x73. The issue is that: When we finish…

  • 3 months ago
  • Clock & timing
  • Clock & timing forum

• LMK04828: LMK04828 has no output

  

  Kailyn Chen

  Part Number: LMK04828 Hi， Our customer used the LMK02828 sync function and power down the PLL, CLKIn0 and CLKIN1 are the LVDS input, and CLKIN1 is used as Fin, but it has no output, when he used the EVM board, it could output normally. His configuration…

  • 3 months ago
  • Clock & timing
  • Clock & timing forum

• LMK04828: crosstalk data

  

  Ben Kuo

  TI Thinks Resolved

  Part Number: LMK04828 Dear team, Did we have crosstalk data can share with customer? I cannot find this information from datasheet. Thanks. Regards, Ben

  • 20 days ago
  • Clock & timing
  • Clock & timing forum

• LMK04828: LMK04828 dynamic DDLY

  

  gang huang

  TI Thinks Resolved

  Part Number: LMK04828 I got some questions about the DDLY: 1. Can the DDLY be used together with the ADLY? If so, how should I set the DCLKoutn_max? 2. In manual 9.3.3.3, steps 6 and 7, both started with the SYNC_MODE, are they going to override each…

  • 3 months ago
  • Clock & timing
  • Clock & timing forum

• LMK04828: Zero Delay Mode / Nested Zero Delay Mode

  

  Pavan

  Part Number: LMK04828 Other Parts Discussed in Thread: LMK04832 Hi I am using LMK04828 in Dual Loop Mode, Input parameters : Clk_in 1 : 200 MHz Oscin : 122.88 MHz Output parameters : Dclkout0 : 400 MHz Dclkout2 : 2 00 MHz Sdclkout 2 : 6.25 MHz I need…

  • 21 hours ago
  • Clock & timing
  • Clock & timing forum

• RE: LMK04828: LMK04828 Zero Delay Feedback

  

  Timothy T

  Hello Shekhar, Shekhar Kulkarni said: If my above scheme would give me all LMK outputs in phase with input reference clock, then why do we need to have Master LMK and Slave LMK concept I suggested this because it can simplify your job of providing SYSREF…

  • 3 months ago
  • Clock & timing
  • Clock & timing forum

• LMK04828: LMK04828 configuration

  

  JH Shin

  TI Thinks Resolved

  Part Number: LMK04828 Hello, My customer is using the LMK04828 in the system that uses the recovery clock received through an optical connection from the master unit as a reference clock. In the system test, they found that the clock of the LMK04828…

  • 4 months ago
  • Clock & timing
  • Clock & timing forum

• LMK04828: LMK04828 Sync and SYSREF

  

  Shekhar Kulkarni

  TI Thinks Resolved

  Part Number: LMK04828 Hi, Can anyone clearly define the functionality of SYNC and SYSREF Divider in LMK04828 And how re-clocking SYNC pulse driven from Master LMK's SDCLKout makes slave LMK in sync with Master LMK's DCLKout ?

  • 4 months ago
  • Clock & timing
  • Clock & timing forum

• LMK04828: Is it possible to use LMK04828 for 1PPS distribution?

  

  Mark Browning

  TI Thinks Resolved

  Part Number: LMK04828 For 1PPS distribution I need at least 10 LVPECL outputs and individual phase adjustment. The LMK0482x parts have these features, but the Fin minimum frequency spec is 1KHz (with Fin AC coupled). If I used Fin in DC coupled mode,…

  • 3 months ago
  • Clock & timing
  • Clock & timing forum

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