Part Number: LMK1C1104 Hello. Can you please confirm that it is not a problem to use a 3.3V LVCMOS signal on the input clock when VCC=1.8V? There is no maximum specified in the datasheet for VIH, which leads me to believe that the "absolute" max of 3…
Part Number: LMK1C1104 Other Parts Discussed in Thread: DP83869HM , , LMK1C1108 Hi Everyone,
Clocking Architecture for DP83869HM Ethernet PHY:
In my design I have 14 Ethernet Interfaces. 10 was configured as 1000BASE-T and 4 was 100BASE-TX.
Part Number: LMK1C1104 Hi Team，
During the test, the customer found that the rise and fall time of the 125MHz clock output by the LMK1C1104 is long, about 1ns. Could you please help support the following requests and questions:
1. From the DS, when the…
Part Number: LMK1C1104 Other Parts Discussed in Thread: CDCLVC1104 , Hi,
I'm looking at LMK1C1104 to replace CDCLVC1104. I have two basic questions regarding termination.
1. The same receiver can be terminated with 50ohm like Figure 8-2 while it can…
Part Number: LMK1C1104 Other Parts Discussed in Thread: SN3257-Q1 , TMUX136 , TMUX6119
Looking for a SPDT switch to connect the COM to the CLK input of the LMK1C1104 for 1.8V and 3.3V LVCMOS.
Would be good if the inputs would be 5V tolerant.
Part Number: LMK1C1104 Hi
The clock buffer LMK1C1104DQFT has a absolute maximum rating of 3.6V on VDD pin. For 10% derating, i.e at 90% rated voltage operation,this IC fails.
3.3V/3.6V = 0.916 = 91.6%.Kindly let us know if the absolute maximum voltage…