Hi Jiejun,
You were correct in your assessment - the version of this file is 4.0. I did what you mentioned and changed the version of the file to 4.0 in Visual IBIS Editor, and I was able to import the model to Altium without issue.
Thanks,
Michael
Part Number: LMK1C1108 Tool/software: Hello,
Question 1: Is LMK1C1108 a trigger structure?
Question 2: As shown in the EVM circuit diagram below, the input requires the addition of pull-up and pull-down resistors. What is the required voltage amplitude…
Part Number: LMK1C1108 Other Parts Discussed in Thread: TMAG5273
Tool/software:
Hi team,
I am considering using 21 LMK1C1108s to distribute SCLs from one FPGA to 161 TMAG5273s.
Q1. Do I need a pull-up for each output? (It enters TMAG5273)
Should it be…
Part Number: LMK1C1108 Tool/software: As shown in Figure 1,
connect the output of the OCXO(Oven Controlled Crystal Oscillator) to the CLK-IN pin of LMK1C1108.
The 3.3V power supply is normal, and the Pin2 pin (1G) of LMK1C1108 is supplied with a high…
Part Number: LMK1C1108 Hello,
I am trying to fan out a signal for my application. My signal is LVTTL (3.3V, single ended) and I am using evaluation board ( LMK1C1108EVM). When i insert my signal it does not come out of any output. I tested the board with…
Part Number: LMK1C1108 I have a design with 1.8V supply where the input is a 25MHz clipped sine. The V_IL, V_IH and the negative slew rate are within specification but the positive slew rate is just outside with 0.07 V/ns. It seems to work nicely anyway…
Part Number: LMK1C1108 For some reason, in my circuit LMK1C1108 is not working with static input (input = HIGH).
It works fine with a 20MHz clock input (ASCLK1).
The output doesn't always rise from LOW to HIGH when there is a step input (ASDI1). …
Part Number: LMK1C1108 Hi,
I would like to use a clock buffer to split a trigger pulse to several devices in the same time, of course.
Is it possible to simulate this component : LMK1C1108 with PSpice for TI public version ?
How can I find or add this…