Part Number: LMK5B33216EVM Tool/software: Hi,
I'm running some tests which involve checking the EEPROM on the devise.
I see that R170 NVMSCRC is defined in the programmers guide as "NVM Stored CRC", but no definition for R172 NVMLCRC. Both registers…
Part Number: LMK5B33216EVM Other Parts Discussed in Thread: LMK5B33414 , LMK5B33414EVM Tool/software: Hi Clock team,
I'm trying to program the EEPROM of the LMK5B33414 so that the OUT12 outputs a 0.5M clock on power up without configuration, but I…
Part Number: LMK5B33216EVM Tool/software: Hello,
We are using a reference input configuration with DPLL3 that seems to uncheck its loss of lock status signals. Measuring the reference input and a relative output, we can't seem to see their phase lock…
Part Number: LMK5B33216EVM Other Parts Discussed in Thread: LMK5B33216 Tool/software: Hello.
Maybe I'm missing it but I don't see that parameters listed anywhere in the users guide other that the 25MHz frequency.
What is the waveform type and suggested…
Part Number: LMK5B33216EVM Other Parts Discussed in Thread: LMK5B33216 Hello,
We have bought a LMK5B33216EVM board to prototype a component for a radio synchronization system for one customer.
Our goal is to have an LVCMOS input on IN0 (at whatever…
Part Number: LMK5B33216EVM Tool/software: Hi,
I'm probably missing the obvious here but anyway...
I want to use REF0 for all three DPLLs. The status page shows DPLL 3 enters frequency and phase lock, but DPLL 2 and 3 won't lock probably since they…
Part Number: LMK5B33216EVM Other Parts Discussed in Thread: LMK5B33216 , LMK5C33216A Tool/software: Hello,
We are using the LMK5B33216 Evaluation board with the default TCXO (48MHz) with a single-ended 125 MHz input connected to IN0_P (J4). It looks…
Part Number: LMK5B33216EVM Hello, As described in a previous post ( e2e.ti.com/.../lmk5b33216evm-tics-pro-settings-not-applied-on-lmk5b33216evm) we have a LMK5B33216EVM board and we would like to prototype a wireless synchronization system. We have given…
Part Number: LMK5B33216EVM Hi,
I plan to lock DPLL3 to 1pps (1Hz) at IN0_P port of the eval board. I use APLL3 with external XO of 100MHz to produce 156.25MHz HSDS output at port 4. APLL3 locked well to 100MHz XO independent to DPLL3 status. Somehow…
Part Number: LMK5B33216EVM Other Parts Discussed in Thread: LMK5B33216 Hello,
we are planning on using the LMK LMK5B33216 for a timing synchronization project and would like to have a sample programming file as a starting point that we can modify and…
