Part Number: LMK5B33414 Other Parts Discussed in Thread: LMK5C33414A
Hello:
My customer was conducting experiments with the LMK5B33414EVM development board while using 1PPS. I input a second pulse with an accuracy of 25 ppb to IN0. With ZDM enabled…
Part Number: LMK5B33414 We need TI’s help on the clock generator which includes JESD204B clocking. We tried the TICS Pro and the Clock Tree Architect. We can’t come up with a solution with the TICS PRO with the proposed devices from the Clock Tree Architect…
Part Number: LMK5B33414 Hello, I have some issues configuring my LMK5B33414 with 1PPS Input and output.
My goal is to use the jitter-cleaner function to read the 1PPS input and to integrate it to have a 1PPS output "cleaned" from its natural jitter…
Part Number: LMK5B33414 Tool/software: Hi team,
This is post on customer's behalf.
LMK5B33414 XO input 48MHZ (±50ppm), IN0 input 25MHZ (±10ppm), LMK5B33414 operation jitter attenuation contempt, OUT0 output 312.5M clock, 312.5M clock accuracy ±50ppm…
Part Number: LMK5B33414 Hello,
I would really appreciate feedback from specialists in the Clocks & Timing field to determine whether the objective we have in mind is feasible or not.
Our goal is to synchronize two independent 10 MHz clocks with sub…
Part Number: LMK5B33414 Tool/software: In ZDM mode i can calibrate phase offset but if there is some flag or interrupt that says this calibration has ended? I can't find any.
Part Number: LMK5B33414 Hello,
I’m using the LMK5B33414 to generate multiple outputs phase-locked to a GPS-disciplined 1 PPS signal, but I’m having trouble getting DPLL to reach phase lock. The frequency lock (LOFL_DPLL) sometimes clears, but the phase…
Part Number: LMK5B33414 Tool/software: Hello team,
Currently my customer is using LMK5B33414 on their board. There is a test case that the input will be disconnected and the interrupt will be generated by device and report to the GPIO.
In this case…
Part Number: LMK5B33414 Tool/software: When I was testing the ZDM mode with a 10M reference input using LMK5B33414, I noticed that the phase of the reset chip was deviating. What could be the reason for this? The attachment contains my configuration file…