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  user4532109

  • 2 months ago
  • Clock & timing
  • Clock & timing forum

  LMK61E2: IIC address

  • Resolved

  Part Number: LMK61E2 I am now using the LMK61E2 . I wrote an FPGA-based IIC configuration code
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  Roy Chou1

  • 5 months ago
  • Clock & timing
  • Clock & timing forum

  LMK61E2: EEPROM write

  TI Thinks Resolved

  Part Number: LMK61E2 Hi Team, I know there is sec 8.5.5 which is writing EEPROM step by step procedure. But I would like know if LMK61E2 have a function that MCU know the LMK61E2 had been burned. The reason I ask that because I would like to use...
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  Roy Chou1

  • 5 months ago
  • Clock & timing
  • Clock & timing forum

  LMK61E2: Register setting for 150MHz and 75MHz

  TI Thinks Resolved

  Part Number: LMK61E2 Hi Team, I used the TICS pro to set the desired clk frequency(150MHz and 75MHz) and export the address and the data. 1. Could you help check below register value is correct or not 2. If I would like to do command in LMK61E2...
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  Dawid Marczewski1

  • 6 months ago
  • Clock & timing
  • Clock & timing forum

  LMK61E2: LMK61E2 - very large frequency error.

  TI Thinks Resolved

  Part Number: LMK61E2 Hello, I am developing a system that uses LMK61E2BAA as main oscillator. I am using TI provided Oscillator Programming tool for generation of register maps, however, even while tool reports that target frequency is achieved with...
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  wallace liu

  • 9 months ago
  • Clock & timing
  • Clock & timing forum

  LMK61E2: To write 0x13 to R49 will trigger EEPROM Erase and EEPROM write, is there any confliction?

  • Resolved

  Part Number: LMK61E2 Hi Alan, In your e2e reply to " LMK61E2 : Save ... on LMK61E2 on-chip EEPROM
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  wallace liu

  • 9 months ago
  • Clock & timing
  • Clock & timing forum

  LMK61E2: Will reserved bit in the register ignore coorsponding bit in byte writing? How to chose an optimal value for XO_CAPCTRL?

  • Resolved

  Part Number: LMK61E2 Hi Experts, LMK61E2 has reserved bits in its registers. Most reserved bits
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  Adam Siismets

  • 8 months ago
  • Clock & timing
  • Clock & timing forum

  RE: LMK61E2: Sometimes the PLL does not lock

  Hi there, Yes you're right. Doing the soft reset last in your procedure is correct. The SWR2PLL register doesn't clear the registers, it just resets the calibration and the clock dividers. Hopefully this solved your issue. I will close...
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  Mario Monti

  • 3 months ago
  • Clock & timing
  • Clock & timing forum

  RE: LMK61PDEVM: Pre-programmed frequencies

  Hello Amin, thank you for all the answers that fully clarified all my doubts. I will definitely go for LMK61E2. Kind regards, Mario
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  dBrock

  • 11 months ago
  • Clock & timing
  • Clock & timing forum

  LMK61E2: Synchronizing multiple LMK61E2

  • Resolved

  Part Number: LMK61E2 Hello, I am considering using two LMK61E2 devices, but I was unable to find
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  Shikhar Makhija1

  • 3 days ago
  • Clock & timing
  • Clock & timing forum

  RE: LMK61E2EVM: Is the following configuration correct?

  Hi Vibhu, In general what is the rule for a device to drive a PLL or PLL+VCO? The driving frequency first device should just be in the range of the input range of second device? Or you need to be driven by some multiple only? Regards, Shikh...

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