Part Number: LMX1204 Hello TI Team,
I have requirement to Clock Buffer (same as LMX1204 or equivalent) for distribution of Clock frequency upto 12GHz along with JESD204B Sysref generation. But I need two (CLKIN) inputs and internal switching option between…
Part Number: LMX1204 Hi Ti team,
In my project im using LMX1204RHAR to generate REF_CLOCK and SYSREF for ADC, can anyone help me how to use SYSREFREQ_P&N as single ended signal.
please find the attached schematic image.
Part Number: LMX1204 What determines the lower limit of 1MHz for the LOGICLK?
We have a situation where we'd like to use it for a DC-DC converter sync clock at 500kHz.
Thanks in Advance.
Part Number: LMX1204 I need a little help clarifying the use of the SYSREF Global Delay in Repeater mode. Based on my interpretation of the data sheet, I should be able to use the delay in repeater mode. The data sheet recommends that SYSREF_DELAY_BYPASS…
Part Number: LMX1204
Hi IT team,
I'm using LMX1204 in my project. I got a doubt in power level of clock out signal when I was going through the datasheet. As per figure 6-14: CLKOUT Waveform at 1 GHz, in which square waveform is used for the analysis…
Part Number: LMX1204 Hi team
Could you tell the supply current of each pin as below? Customer needs this information to decide the power devices. it would be great if you can provide typical value and min & max value.
VCC_CLKIN
VCC_LOGICLK
VCC0…
Part Number: LMX1204 What is the recommended differential to single ended circuit for the LMX1204 clock inputs and outputs with a 1250MHz signal? I was planning on using the TC1-1-13MX+ from MiniCircuits unless otherwise advised. Are additional termination…
Part Number: LMX1204 Other Parts Discussed in Thread: SN74LVC1G17 Hi,
I am using LMX1204 in my design.
Configuring LMX1204 from FPGA through SPI. My FPGA bank voltage is 3V3 and LMX1204 is working with 2V5 Voltage.
In datasheet, it's telling LMX1204 can…
Part Number: LMX1204 Hi Team,
I'm actually using your LMX1204 as master for my distribution network for multidevice synchronization (2 x Chips with 4 ADC each) and JESD204B.
Regarding to your document 3823.Multi-Device Synchronization of JESD204B Data…