Other Parts Discussed in Thread: SN65LVDS387 Dear all,
I am designing a data acquisition system with TSW1405EVM, and trying to connect the output of TI LVDS driver(SN65LVDS387) with TSW1405EVM board through Samtec connector.
Is there any person can tell…
Other Parts Discussed in Thread: SN65LVDS387 Hai,
How can we operate SN65LVDS387 in multidrop interconnections like 'Four 1:4 multidrop' or '1:16 multidrop'.
When we are implementing 'Four 1:4 multi-drop' ,Do we need to connect inputs only…
Other Parts Discussed in Thread: SN65LVDS387
Field Question:
A customer has to connect 16 signals at 100MHz between a mother board and a daughter board with a distance of 10cm. They though to use our SN65LVDS387 to perform the connection but they have…
Akashi
We do not have a 5 channel LVDS part, we do have 8 channel or 16 channel parts.
For parts with more than 600Mbps data rate, please refer to these parts: SN65LVDS387, SN75LVDS387, SN65LVDS389 SN75LVDS389, SN65LVDS391, SN75LVDS391.
Thanks
David
…
Hello Art,
Let me look into this and get back to you. Please notice that the SN65LVDS387 device and its EVM do not have any memory elements at all.
Regards,
Yaser
Part Number: SN65LVDS391 Other Parts Discussed in Thread: SN65LVDS387 , SN65LVDS389 , , SN75LVDS387 , SN75LVDS389 , SN75LVDS391 On the first page of the datasheet below, under Device Information, it looks like the part numbers are out of order:
SNx5LVDS3xx…
Part Number: DAC5675AEVM Hello,
I am testing DAC5675A EVM. The problem is that no DAC output signal occurs.
The state of J8 was always 'HIGH' and never changed.
I setup test environment following 'DAC5675A EVM Quick Start Guide' document.…
Hi, Nirav,
The reason that I didn't choose SN74AVC4T234 is 11uCSP package.
I checked all TI's level translators today, and found LSF0204 which is a passive switches based level translator may be compatible with my design, the datasheet of LSF0204…
Hi Andrew,
1. LVDS line driver enable means CMOS data applied at input connector P2 is converted to LVDS and applied to the DAC's input.
2. When input CMOS data is applied at connector P2 and W3 is set to 2-3 enabling the CMOS data's conversion into…