Part Number: SN74LVC1G373 Hi team,
Can you please reply to the following question?
SN74LVC1G373’s datasheet specifies VIL=0.8V at Vcc=3.3V. However, in customer's test, the latch seems disabled when LE pin falls around 1.4V.
So, is it correct…
Other Parts Discussed in Thread: SM320C32PCM60 , SN74LVC1G373 Hello,
L&T Technology Services, headquartered in Vadodara, India, is working as a consultant for (client).
Below mentioned parts have been recommended for use in client's design. As a few…
Other Parts Discussed in Thread: SN74LVC1G373 Hello, We use SN74LVC1G373 in our devices. If it’s correct, in terms of internal scheme of SN74LVC1G373, to make direct connection between LE and Q pins, as shown on picture.
Regards, Milochkin
Other Parts Discussed in Thread: SN74LVC1G373 Hi
We would like to use the YZP package of SN74LVC1G373 but we can't decide the correct pinout numbering;
In the first page of the datasheet the pins numbered from 1 to 6, in page 17 the pins have A1-C2 marking…
Part Number: SN74LVC1G74 Other Parts Discussed in Thread: SN74LVC1G373 , SN74LVC1G99 , SN74LVC1G125 , TLV803E I need to understand the condition PRE=L, CLR=L, D=X, CLK=X. So that I can decide the logical usage of this Flipflop. Is there any timing constrain…
Part Number: SN74HCS237 Other Parts Discussed in Thread: SN74LVC1G373 Hello,
probably there is a mistake in SN74HCS237's datasheet.
In pag.1 under Description "When the latch enable (LE) input is high, the device acts as a standard three to eight decoder…
OK, the problem has been found and hope I can download the updated PSPICE file on the official product page soon. Please do not forget that the PSPICE model of SN74LVC1G125 has the same problem, which needs to be corrected.
SN74LVC1Gxxx series of logic…
Hi Patrick , You could use the preset and clear inputs to override the clock to change the output Q asynchronously in the SN74LVC74A. You can also consider using sn74lvc1g373 where the output level is determined by the latch enable pin and hence independent…
