Part Number: SN74LVC2G86 Other Parts Discussed in Thread: SN74AUC2G86 , SN74LVC86A-Q1 , SN74HCS86-Q1 At present, I have customers who need to recommend XOR logic materials.
The demand is 3.3V, dual input, two groups.
I would like to ask if BU is currently…
Part Number: SN74LVC2G86 Hi Team,
Please help to provide the thermal shutdown temperature for part number SN74LVC2G86DCUR. This is required for thermal analysis for our customers.
Best regards,
Jonathan
Part Number: SN74LVC2G86 Hello,
Our customer has an question for latch-up test condition in our reliability test of SN74LVC2G86DCUR.
Our qualification summary report says that our latch-up test is based on JEDS78.
But they are not familiar with this…
Part Number: SN74LVC2G86 Hi Team,
A customer is simulating SN74LVC2G86 and encountered an error in the spice model. Here is his inquiry.
"I need to use the 74lvc2g86 with all voltages translated down say vcc=-3V vee=-8v and same with inputs and outs…
You already have twisted pairs. So consider using LVDS. Or creating your own differential protocol by using SN74LVC2G86 and comparators.
If you really want to use single-ended signals, then your only choice is to add low-pass filters to remove high-frequency…
Part Number: SN74LVC2G86 Hi Guys
Customer is using our SN74LVC2G86. There is a detailed question about the input logic voltage level:
There are two understandings of Vih in the SN74LVC2G86 SPEC:
1. The minimum Vih value is 2V, assuming Vih is 2.1V, indicating…
The logic family with the strongest symmetric output drive is LVC (±32 mA at 5 V). You could use the SN74LVC2G86 to have both buffer and inverter in one device.
For even higher drive strength, use a gate driver like the UCC27325 (rated for ±200…
Sorry TINA do not support IBIS model . Please Use H spice for that model. IBIS model is file that contain information about input and output characteristics and timing modeling which can be used for simulation without knowing internal architecture on…
Here is a Q and Q\ buffer CD4041. It is fairly old technology so it is slow.
An easy way to create this is to use something like the SN74LVC2G86 Xor gate. Tie one input on one oth the gates to gnd and one input on the other gate to vcc. Then run your clock…