Konrad,
It looks like you have very short traces for data, but the WCLK has longer trace and likely more significant capacitance. This would delay WCLK closer to align with data. This may cause a setup or hold violation as data may change during setup…
Hi
We have similar problem with SN74v245, could you tell me what interface you using now and what was wrong in previous one? We read data from fifo using PIC32MZ PMP interface.
Part Number: TMS320C6657 Other Parts Discussed in Thread: SN74AVC16T245 , SN74V245 Tool/software: TI-RTOS Hello
I would like to ask for advice regarding a design. The question contains some elements of software and some elements of hardware.
The idea…
Other Parts Discussed in Thread: TMS320F28335 , SN74V245 I am designing an embedded system using the TMS320F28335 DSC. There is a synchronous FIFO SN74V245 in it to help pace the image capture. I plan to repeatedly read the FIFO via XINTF mapped to Zone…
Other Parts Discussed in Thread: SN74V245 , SN74LS163A Hello! I am designing an acquisition system using the "equivalent time sampling" method (input signal is a pulse with 1.5 ns risetime and 10 ns pulse width, 5 v peak to peak), the project is in design…
Hello,
In my application i use three adcs, which write data to three fifo. Next i must read data from fifo and this is my problem, because I don't know, which proccesor use to this task. ADC gets data with 8MHz clock by 250us and I have a 250us delay…