TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • API solutions
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel


Search tips
Showing 291 results View by: Thread Post Sort by
  • CDCM7005: Scope between CPout and Vtune in VCXO

    Jade Goo
    Jade Goo
    TI Thinks Resolved
    Part Number: CDCM7005 Hi Team, I saw abnormal charge pump voltage scope like as below. PDF is 80kHz and matched with scope peak period. When I measured in EVM, CP voltage scope was different. In my understand, CP voltage level should be stable…
    • over 8 years ago
    • Clock & timing
    • Clock & timing forum
  • CDCM7005: Interfacing with LVCMOS VCXO.

    Filip Ozimek
    Filip Ozimek
    TI Thinks Resolved
    Part Number: CDCM7005 We want to use CDCM7005 to improve clock jitter. The evaluation board (CDCM7005-SP Evaluation Module) is configured to work with PECL VCOs although we plan to use LVCMOS 100 MHz VCXO. The board is populated with PECL terminating…
    • over 8 years ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • CDCM7005-SP: SEE report missed at ti.com

    Dimitrius
    Dimitrius
    Resolved
    Part Number: CDCM7005-SP Hello All, at www.ti.com/radiation I cannot find SEE test report on CDCM7005-SP (5962-0723001VXC). How can I have it? Best regards, Dmitry
    • Resolved
    • over 7 years ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • CDCM7005: Can This Part Synchronize to 1PPS

    gchampin
    gchampin
    Resolved
    Part Number: CDCM7005 Other Parts Discussed in Thread: LMK05028 Hello, I am trying to develop a solution that will take a 10 MHz signal from a OCXO and synchronize it to a 1PPS signal from GPS. Afterwards, I would like to synthesize frequencies that…
    • Resolved
    • over 8 years ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • CDCM7005-SP: HW Reset to SPI time

    user5869142
    user5869142
    Resolved
    Part Number: CDCM7005-SP What is the specification for the SPI interface after reset? When is the SPI interface operable after HW Reset.
    • Resolved
    • over 7 years ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • CDCM7005EVM-CVAL: CDCM7005-SP Evaluation Board

    Miles Darnell
    Miles Darnell
    Resolved
    Part Number: CDCM7005EVM-CVAL Other Parts Discussed in Thread: CDCM7005-SP Hello, I have the 2018 release of CDCM7005-SP EVM GUI. What is the correct adapter cable to connect to SPI interface of the eval board? thanks, Miles
    • Resolved
    • over 8 years ago
    • Clock & timing
    • Clock & timing forum
  • CDCM7005-SP: Flight heritage of device

    Christophe CARA
    Christophe CARA
    TI Thinks Resolved
    Part Number: CDCM7005-SP We are currently involved into the development of flight hardware for an European ESA mission. We foresee to implement a jitter cleaner based on the CDCM7005-SP PLL controller. ESA is asking for a flight heritage of this device…
    • over 8 years ago
    • Space & High Reliability (Read Only)
    • Space & High Reliability Forum (Read Only)
  • CDCM7005 not locking

    Tiago Goncalves
    Tiago Goncalves
    TI Thinks Resolved
    Other Parts Discussed in Thread: CDCM7005 Hello, I am unable to have a lock on the clock while having a reference 48Mhz clock and a 48Mhz output. I am using the passive loop capacitors and resistor values that are given as example in the datasheet…
    • over 9 years ago
    • Clock & timing
    • Clock & timing forum
  • RE: CDCM7005: Reference clock selection in manual mode

    seb geff
    seb geff
    Hi Tim, I monitor the pins: - PRI_SEC_CLK (23 qfn) to know the reference clock selected - PLL_LOCK (25 qfn) to know if the PLL is locked In automatic mode (word_0, bit_30 = 1), the PRIM_CLK is selected and if I remove it, the CDCM doesn't toggle…
    • over 8 years ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • CDCM7005 unable to lock

    Tiago Goncalves
    Tiago Goncalves
    Resolved
    Other Parts Discussed in Thread: CDCM7005 Hello, While using a custome prototype board. I am unable to have a lock on the clock while having a reference 48Mhz clock and a 48Mhz output unless I am using Cycle Slip Lock Window. However it doesn't seem…
    • Resolved
    • over 9 years ago
    • Clock & timing
    • Clock & timing forum
<>

Didn't find what you are looking for? Post a new question.

  • Ask a new question