Hi,
Regarding skew at output between Device CLK and SYSREF, the Datasheet doesn't say the spec.
However, we believe the spec is the most important for JESD204B interface. why the skew isn't specified in the Datasheet ?
Best Regards
Kato
Part Number: AFE5818EVM Other Parts Discussed in Thread: AFE5818 , , LMK04826 Tool/software:
Dear support,
I would like to ask some questions. Regarding "E.2 AFE5818 EVM Schematic" of AFE5818EVM_UM.pdf.
1. What are Y1(125MHz) and Y2(100MHzVCO for…
Part Number: LMK04828BEVM Other Parts Discussed in Thread: LMK04828 , LMK04826 We are trying to program the CLK104 on the ZCU208 board and these are the values that we want to setup
Name
Value (MHz)
DDR ref clock
250
…
Part Number: LMK04832 Other Parts Discussed in Thread: LMK04828 , , LMK04826 Hello TI Team, I am currently using the LMK04828 in my design (WQFN-64, 9×9 mm package). Due to availability and performance considerations, I am evaluating the LMK04832 as a…
Part Number: AFE58JD48EVM Other Parts Discussed in Thread: CDCM1802 , , LMK04826 Tool/software: Hi,
I would like to understand the clock tree of the AFE58JD48EVM : What is the role of the CDCM1802 component?
The JESD interface between the FPGA and…
Part Number: PLLATINUMSIM-SW Other Parts Discussed in Thread: LMK03318 , LMK04826 I used the Clock Tree Architect to come up with the parts for my clock tree. It has a LMK03318 sending a 1000 MHz signal to a LMK04826B. I went to PLLatinum Sim and selected…
Hi Sheetal,
Based on our discussion, my understanding is that we can use the LMK04826 as the primary clock solution for our design.
Kindly confirm the following:
We do not require an external programmable oscillator as a master clock reference…
Part Number: LMK04828 Other Parts Discussed in Thread: LMK04832 , LMK04832-SP , LMK04826 , LMK04714-Q1 , LMK04832-SEP , LMK04368-EP , LMK04821 Hi support team,
We have a question regarding the LMK04828.
We want to connect via CLKin1 (10MHz) and use…