Part Number: LMK04828 Tool/software: Hello,
The customer wants to achieve phase synchronization of the LMK04828 output clock between multiple boards, but the phase always changes randomly. Synchronization scheme (status): The 125M input is provided…
Part Number: LMK04828 Tool/software: Greetings.
I am trying to configure LMK04828 to use a 100 MHz oscillator connected to OSCin (bypassing the CLKin inputs entirely) to generate 100 MHz clocks on all DCLKoutX pins.
The issue is that PLL2 is not achieving…
Part Number: LMK04828
Tool/software:
Hi everyone! In the document High-Channel-Count JESD204B Clock Generation Reference Design for RADAR and 5G Wireless Testers distribution mode is used both for master and slave devices.
It is said that CLKin0…
Part Number: LMK04828 Other Parts Discussed in Thread: , AFE7900EVM
Tool/software:
Hello TI Team,
We are using LMK04828 in one of our design, we need to know the two things about oscillator input pins.
1. What is the maximum allowable input…
Part Number: LMK04828 Tool/software: I am trying to configure registers for LMK04828 in CLK104 board along with ZCU216. I am trying to give external input to J11 sma which is inturn connected to Clkin_0 of LMK04828. Even when i am disabling automode and…
Part Number: LMK04828 Tool/software: Dear Team,
In our schematic, we are using the LMK04828B, and our intention is to directly route CLKIN0 to the SYSREF path, and similarly, route CLKIN1 directly to the external VCXO path. That means input are expected…
Part Number: LMK04828 Other Parts Discussed in Thread: LMX2594 Tool/software: We are working on ZCU208 board. We need to generate 1.96416GHz sampling rate with external clock 10.23MHz to CLK104 module consisting of LMK04828B.
I did configuration in…
Part Number: LMK04828-EP Other Parts Discussed in Thread: AFE7950 , LMK04828 , LMK04368-EP , , LMK04832-SEP Tool/software: Hello TI Team,
We are using LMK in our design for providing clean differential clocks to AFE7950 and MPF500T FPGA.
Both are…
Part Number: LMK04828 Tool/software: I want to use a master LMK04828 to generate 7.8125M clock and input it to the in0 port of two LMK04828 chips for multi-board synchronization.
The clocks of the two slave machines I tested were basically synchronized…
Part Number: LMK04828 Tool/software: LMK04828:
DCLK :144MHz
SYNC PIN :9MHz Under the condition, sdclk(sysref) duty cycle is not 50%.
In the sdclk(sysref) output port Some output ports satisfy 50%, but other sdclk(sysref) output ports are around 56…
