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AFC2101 Photo-current and Noise

nicholas shrake
Prodigy 80 points
Other Parts Discussed in Thread: ACF2101

Hello TI community,

I've been using AFC2101 for a project, with great success but now I'm trying to improve my design.  I use AFC2101 in switched mode and have a polypropylene (WIMA) S/H capacitor which is what my ADC samples on (also my test point for this post). I'm working to create a better absorbance detection unit -- I know a blank reading registers about 100 uA of photocurrent on a photodiode (I verified this with a Newport power meter), but this means (5 A.U. = 1 nA photocurrent, 6 A.U. = 100 pA).

I was interested in what leakage current works its way to input of AFC2101 amplifier so I disconnected the Switched Input A (SW_IN_A) and let the pin float.  I set a very high integration time (100 millisecond) and then look at output voltage.  From Page 9 of AFC2101 datasheet from TI.com I find nice equation to find output voltage with integration time.
 
These output voltages are taken from sampled output capacitor on a Fluke DMM:

If I integrate for 2000 microsecond I get output voltage +8.17 mV

If I integrate for 100 millisecond I get output voltage -10 mV

So for a delta time of roughly 98 millisecond I get a delta voltage of roughly 18.17 mV.  Running from Page 9 I figure that this gives me approx a leakge current of 18.5 pA (18.5 PICOAMPS, very good).  

So I have several questions:

1.) For low integration period (2000 microsecond) is this +8.17 mV "offset" from charge transfer and general mismatch in the 2101?  How can I determine where the 2101 begins integration..  Datasheet says "The integrator output voltage range is from +0.5V to –10V." Does this mean I'm observing 491.3 mV of offset from my first integration.

2.) Is my method sane for determining bias current?  I let the SW_IN_A pin float and then analyze two different integration periods.  Another experiment I can do is when I get my PCB back from AC I'll put it in my dark Box with the photodiode.  Currently, I can't seem to shield the photodiode well enough (even in dark enivorment there is always a 100 nA current, I did not reverse bias the diode).

3.) The datasheet says the AFC2101 has Bias current of typical 0.1 pA and maximum of 1 pA.  In circuit designs like this how feasible is it to approach this limit?  I'm very new to low noise circuit design but I've followed up with guarding ringing my high impedance nodes.  Any other tricks?  How can I quantify these measurements?

Sorry for huge post but TI staff and community is very helpful so please any help or discussion would be great.

  • 0
    TI__Expert 7185 points

    Hi Nicholas,

    Sorry for the delay on this.  Here are some answers to your questions:

    1)  Yes, the 8.17mV is a combination of charge injection, amplifier offset, and the integration of the input error current (input bias current).  The AFC2101 begins its integration almost immediately after the switch is opened.  The output voltage range of +.5V to -10V does not imply that you will see a 500mV offset upon the start of your integration.  This is simply a description of the output voltage range of the integrating amplifier.  Since the AFC integrates in a negative direction, the most positive output voltage will occur at t = 0 when the switch is initially connected and its magnitude is primarily a function of charge injection.  The amount of charge injection is a dependent on the parallel combination of OPA input capacitance and the shunt capacitance of the photodiode seen at the SW In A/B pins.  When making a measurement it is important to give yourself some wait time to allow the settling of the internal OPA to start integrating after charge injection occurs.

    (2)  Yes, the best way to measure the bias current is by taking a two point measurement and then back calculating the current based on the change in voltage vs. change in time.  The ACF2101 has a typical input bias current of 100fA, so with a 100pF integration capacitor you can expect an output voltage change of 1mV/s.  It sounds like you are adding capacitance in parallel to the internal 100pF; you will have to take this into consideration as a 1nF integration capacitor will produce a 100uV/s slope change, so assuming the output voltage change of the AFC will be strictly due to bias current, you really can expect only a 10uV change; therefore, your measurement capability with this may be limited by your A/D converter .  Assuming a 1nF integration capacitor you will probably need more wait time (example:  500ms to 1s) to give yourself enough signal change for a good measurement.

    (3)  Measuring input bias currents < 1pA is not a trivial task.  If your input traces are on the top layer you will be at the mercy of parasitic leakages which can easily exceed the IB levels with even a modest amount of humidity.  Adding guard traces helps but it is even better if you can use a mult-layered FR4 PCB and bury and guard the input traces.

    From a practical standpoint, the best approach for you will be to make a “null” slope measurement of the total error current in the absence of light BEFORE each real light measurement.  This “null” slope measurement will include the effects of IB, PCB leakage, and dark current from your photodiode.  As environmental factors change (i.e. humidity, temperature) so too will the error current; therefore, making a “null” measurement prior to each photodiode measurement will give you a true measure of the error current.  You can then make your real photodiode measurement, calculate the dV/dt, and subtract the error current from your overall photodiode current measurement.

    I hope this helps.

    Matt