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LMP7704-SP: package bottom elec connectivity

Part Number: LMP7704-SP

Is the bottom side of the package electrically connected to anything (see yellow highlight)?

  • Hi Erik, 

    Is the bottom side of the package electrically connected to anything (see yellow highlight)?

    The backside of the thermal pad is typically connected to the most negative supply rail of the PCB design. 

    If Vee negative rail is configured below GND in dual voltage supply rails in LMP7704-SP design. the thermal pad should be connected to the Vee, the most negative supply rail. 

    If Vee rail is connected to GND in a single supply rail design, then the thermal pad should be connected to GND. 

    If you have other questions, please let us know. 

    Best,

    Raymond

  • Thanks, Raymond.

    In my application, we are in single supply rail mode.  My design has a GND plane (electrical ground) and CHASSIS plane (mechanical structure, best path for heat to flow out of the part and out of the card).  GND and CHASSIS are not electrically connected on my card except by a 1Megaohm resistor.  I've connected the VEE- pin to the GND plane.  However, the exposed pad in the layout underneath the part is connected to CHASSIS.  If I thermally bond this part, the thermal pad will be thermally connected to CHASSIS.  But it won't have any electrical connection (thermal bond is an electrical insulator).  Is this OK?

  • Hi Erik, 

    I will get it back to you tomorrow. 

    The thermal pad information in the datasheet is shown some conflict description. I want to verify that how the thermal pad is bonded to Si die's substrate in the part. 

    I understand your inquiry, which you want to maximize the thermal conductivity and the heat transfer from thermal pad to the chassis (likely is a cooling block for the application).    

    Best,

    Raymond

  • Hi Erik,

    If I thermally bond this part, the thermal pad will be thermally connected to CHASSIS.  But it won't have any electrical connection (thermal bond is an electrical insulator).  Is this OK?

    Per my understanding, Vee = GND in a single supply configuration, and the LMP7704-SP's thermal pad will be thermally bonded to CHASSIS in the application, and there is 1MΩ resistor connection between GND and CHASSIS.

    This is good to implement. The LMP7704-SP's thermal pad is thermally bonded to the Si die substrate in the ceramic package.  The LMP7704-SP's thermal pad is also electrically shorted to the topside case or lid. So 1MΩ resistive connection between GND and CHASSIS will be ok. Technically, the thermal pad is only thermally bonded in the package. By bonding the thermal pad to CHASSIS, it will transfer heat to the surroundings. Electrically, there is a path to GND through 1MΩ resistor (which is good). 

    If you have other questions, please let us know. 

    Best,

    Raymond

     

  • Would it be better to solder a wire to lid of the case to GND?  That way it is direct connected instead of going through a 1Mohm resistor.

  • Hi Erik, 

    Would it be better to solder a wire to lid of the case to GND?

    The extra step is not necessary. 

    The electrical connection in the thermal pad is determined how the Si die's substrate is connected to the rest of IC. Since the Si die is thermally bonded to the thermal pad/substrate (not electrical + thermal bonds), the your mentioned configuration is good enough. 

    1Mohm is a way to tie the system ground to all parts of the system, which is a standard way to implement this type of the system. 

    If you have additional questions, please let me know. 

    Best,

    Raymond