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Design active low pass filter

Other Parts Discussed in Thread: OPA227

Dear people,

I am designing a low pass filter using opa227 for my application. I plan to have corner frequency at 1Hz, and with gian 1e9 because my signal is very small. And I decide to use six order with 3 stages, for each stage, I use one order inverting op amp topology with gain of 10 and another one order with gain 100. so the total gain for the 3 stages is 1e9. and I try to simulate it by using Pspice. when i try to obtain the frequency response, there comes out a problem. the gain on the bode plot is not 180dB, but very small. I don know why. I will appreciate if anyone here can help me out. Thank you very much.

Regards,

Xu

  • Xu,

    Please provide a schematic of your circuit.

    Regards, Bruce.

  • Hi, Bruce,

    Thank you for your reply. I will give you my circuit tomorrow.  Thank you.

    Regards, Xu

  • Hi Bruce,

    The attachment is my file2818.file upload.rar, the frequency response is not right and I need your help. It should be 180dB for the gain value DB(V(R62:2)/V(R11:1)). Thank you very much for your help.

    Regards,

    Claire

  • Xu,

    I don't know what simulator you are using and I cannot open these files. Can you please provide an image of the schematic in a common image format such as .jpg?

    Also, can you explain your application? 1e9 is an extraordinary amount of gain and very unlikely to be practical in real circuit. This gain would drive any practical circuit from rail to rail just from internal noise. Still, this circuit can probably be simulated so I would guess that there is some error in the schematic.

    Regards, Bruce.

  • Hi,Bruce,

    I use orCAD 9.2.  What I seed to you is the whole project of my simulation. The first image is the 6 order(3 stages) low pass filter, the 2nd one is the layout for each stage with gian 1000. the first opamp is used as voltage follower. The application is to measure very small voltage signal unit in nanoVolts(1e-9V) below 1 Hz with some large volts at 50 Hz. So I need to attenuate 50Hz signal and amplifier the signal I need to measure. Thank you very much.

    Regards,

  • Xu,

    Sorry, but I cannot open these files as I do not have OrCad. You must have some way to save the schematic as a standard Windows image file such as .jpg or .gif. Otherwise I will not be able to provide further help.

    Regards, Bruce.

  • 6740.images.rar

    Hi, Bruce,

    Sorry for that. I did upload the .jpg for you,and I upload again. hope you can see it. Or Could you give me a email address. So I can send to you. Thank you very much.

    Sincerely,

    Claire

  • Xu,

    Thank you. I can see the schematic now.

    The offset voltage of the first amplifier is enough to drive subsequent stages into saturation. Assume that the first op amp has an offset voltage of 50uV. With a gain of 1e9 through all the stages, the output voltage would be 50000 volts! Clearly this is an impossible circuit. Your simulation is showing that the output is saturated with the DC output voltage driven to one supply rail or the other.

    It might be possible to simulate this circuit by adding a DC input voltage equal to the input-referred offset voltage of the collective input offset voltage of the first three stages. This might depend on the characteristics and settings of the resolution of your simulator. Various simulation settings might need to be changed to accomplish this. Still, you must realize that this would only be an exercise in a computer that could never be realized in an operating circuit. I don't know of a way to design a practical circuit with a DC gain of 1e9.

    Regards, Bruce.

  • Hi, Bruce,

    I agree with what you said the offset voltage part. I wonder if there is a way to adjust the voltage offset to 0 like using a potentiometer. Thank you very much.

    Regards,

    Xu

  • Xu,

    Assuming the temperature drift of the input amplifier is 0.5uV/'C, a 1'C change in the temperature of the amplifier would produce a 500V change in output voltage. It would be impossible to adjust this circuit for stable operation. This could be compared to trying to balance a football on a pencil tip and expecting it to remain stable.

    Simply stated, this circuit cannot work.

    Regards, Bruce.

  • Hi, Bruce,

    I see what you are talking about. I got it. I am new in this area and thank you very much for your guidance. Have a nice day.

    Regards,

    Xu

  • Hi, Bruce,

    Can I ask you one more question about the noise calculation of op amp circuit? I wonder if the noise will be amplified through the circuit like the input voltage? and I notice the noise calculation normally include resistor of the circuit. But how about the capacitors? Thank you very much. Have a nice day.

    Regards,

    Claire

  • Xu,

    Yes, noise of early stages is amplified by subsequent stages. For low noise, you would put the first amplifier in a non-inverting gain of 10 or more so that subsequent stages would not contribute significant additional noise. If this were done in your circuit, the noise of the first amplifier could be as low as about 7nV/root-Hz, rising at 10dB per decade (1/f noise). Integrating this noise over a couple of decades with a cutoff of 1Hz would yield a peak to peak noise of approximately 100nV. With a gain of 1e9 this would produce a 100V p-p noise output.

    Ideal capacitors do not add noise to the circuit.

    Regards, Bruce.

  • Hi Bruce,

    Now I get more clear understanding about the noise of op amp. Thank you for you explanation in detail. One more thing is the capacitors we use cannot be ideal. So what kind of noise it will generate or it just can be ignore compare to other noises?

    Regards,

    Xu

  • Xu,

    For practical purposes you can consider the capacitors to be noiseless.

    Regards, Bruce