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BUF22821 start up sequence

Other Parts Discussed in Thread: BUF22821

Hello,

 About startup of BUF22821 and the write of the register, it wants to be confirmed.

Q1. About timing of the register setting.

 After power activation, is there the regulation of the time about the sequence to the write (I2C access) start to a register?

 Or, after power activation, how much time does communication come to be able to be started for when I wait?  

Q2. About register setting, will the register setting be possible in power activation only to VSD (digital power supply) side?

 (is the power activation necessary for VS (analog power) by all means?)

Q3. Approximately 1A and heavy-current flow rush current to VS (analog power) in power activation of BUF22821.

 Is there the method to reduce rush current by setting of any BUF22821 side?

 It is used in VS = (15.6V).

 

 hope someone can help me.

 

 

  • Hello,

    Q1.)  There is a power-on-reset (POR) circuit in the BUF22821 that activates when the analog power-supply (Vs) reaches about +6.5V.  The POR event takes a very short period of time (~10us) but it sends a signal to read from the OTP memory and load the output registers with the correct values which takes up to 50ms.  Therefore, you should not try to communicate with the device before the POR event finishes which is roughly 50ms after the Vs supply reaches 6.5V.

    Q2.)  You should not try to communicate with the device with only the digital supply (Vsd) applied.  Communication may be successful but the POR circuit will erase any register writes you perform once the Vs supply reaches +6.5V. 

    Q3.)  Once the POR circuit finishes and the OTP values are loaded into the output registers of the BUF22821, the outputs will get set to the voltages they are programmed to.  Therefore if you have a load on the output then the device will have to source current from all 22 outputs into the loads all at once which is why you see the large current spike.  If you've placed a reactive load such as a capacitor on the outputs then this effect will be magnified.  There is really no way to avoid this, but placing large decoupling / bulk capacitors on the +Vs supply will help.

     

  • Hellow Collin,

    It was able to be understood from an operation by your explanation well.

    Thank you very much!