OPA2316: output status when SHDN pin is deasserted in OPA2316

Hi Ron

Thank you for confirming.

But I had another experience, the output started from V- level.

Would you please confirm it again?

I used OPA2316 with below conditoin.

V+ : +3.3V, V- : 0V, +In : 1.59V, -In : 1.44V

After SHDN pin  was deasserted (from 0V to +3.3V), output was high impeadance state until 6us later.

And then output goes to 0V, from 6us to 8us.

After that, output respond to input state, that means output go to V+ level.

BR

Nakagawa 

Nakagawa,

I will test this on my lab bench once the samples I order arrive. OPA2316 has an unusually long enable time for a fast, 10 MHz op amp.

Nakagawa,

I found some samples.

For most supply voltages, the output does visit 0V before settling on the correct output value.

Setup is unity gain. VIN = 1.5V, load is 100k to 0.75V, top trace is enable and bottom trace is output

With 5V supply, there was output low time on enable and a positive rise at disable

With 3.3V supply, there was output low time on enable and a positive rise at disable

With 1.8V supply, there was no output low time

Due to time for each section to turn on or off not being perfectly balanced, the output can go positive or negative momentarily before settle on the correct output voltage.

Hi Ron

Understood with thanks.

For my application, the low time cause troubles.

Could you suggest solution for it ?

Or can't I avoid this phenomina ?

BR

Nakagawa 

Nakagawa,

What is the full part number so I can look for the same package / pinout.
Are there any important device parameters needed for an alternate device?

I also tested TLV9062S and it had a smaller negative dip, but not good enough.

Hi Ron

Thank you for advise.

I would like to know that I can use OPA2316SURUGR by adding some circuit or not.
Do you think it is specific phenomina of the device and I can't avoid the "low time"?

Full part name is OPA2316SIRUGR.
Alternate device must have 3 characteristics as below.
:shutdown (not start from V- level when shutdown pin is deasserted)
:V+=3.3V, V-=0V
:package size requirment <- smallest

BR
Nakagawa

Nakagawa,

I did a sample test on various part numbers and have 4 more on order.

TLV342S sample had a clean enable (not VOL and VOH pulse) comes in RUG package; however the pin out is different!
LMV792 sample had a clean enable (not VOL and VOH pulse) comes in DGS package
OPA2373 sample pulsed VOL then VOH on enable.
OPA2341 sample had a clean enable (not VOL and VOH pulse) comes in DGS package
LMV712 sample has a pull down during disable and enable starts at 0V and comes up cleanly.
TLV9062S sample dips low during enable and comes in DGS package

TLV9002, OPA2322, OPA2363, LMV982 on order

Even if a sample enables cleanly there is no guarantee that every unit will do the same thing and do it every time. Therefore it is best to ignore output until the device has fully recovered from shutdown mode.

Hi Ron

Even if a sample enables cleanly there is no guarantee that every unit will do the same thing and do it every time. Therefore it is best to ignore output until the device has fully recovered from shutdown mode.

Did you mention that TI can't distinguish which parts was designed with no VOL and VOH pulse?

I think your comment meaans you don't have enough information about it now.
If you have enough time, you can proove that the device can operate with no VOL and VOH pulse completely or not.
Does my understanding correct?

 

Anyway, I appriciate your support in this time.

After you get 4 rest samples and evaluate them, please let me know results.

 

BR

Nakagawa

Nakagawa,

The highlighted text is a caution based on the fact that behaviour during the transitions between enable and shutdown are not characterized, not tested in production, and and not specified in the data sheet tables. It is easy to identify devices that might have low or high pulses because one one observation can confirm this. For devices that have samples that transition in a direct path to operational or Hi-Z voltage , it is reasonable to think that most and maybe even all will do the same. However, it is not certain.

Therefore the best solution is to ignore, mask, the output for a short time after an enable. This way the application is robust and tolerant of any behaviour during the enable time.

Hi Ron

Thank you for your comment.

I understood waht you mentioned.

But I can't ignore the low-time in my application.

I really want to search suitable one.

Please let me know the result of devices whoch you are ordering now.

BR

Nakagawa

Hi Nakagawa,

usually, the purpose of such a shutdown feature is to save power supply current of OPAmp and not to support output multiplexing applications. So, it's very seldom specified what the ouput of an OPAmp exactly does during the enabling and disabling. This is no fault of the OPAmp but just normal operation.

One remedy is to search for an OPAmp which is specified for output multiplexing applications. Another option is to use a different method to disable the OPAmp, for instance by the help of a shutdown transistor in the supply line. Or you could additionally clamp the output signal to 0V during the disabling.

Kai

Hi Kai

Thank you for comment.

In this time, I learned that It is usual OpAmp characterisitics that they doesn't gurantee the specification in shutdown.

Your suggestion helps me to solve my issue.

BR

Nakagawa

Hi Nakagawa,

I just realized that my sample order for the remaining devices was incomplete. I fixed that and should have results next week