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LM7322: LM7322 Design issues

Li Chen92
Expert 3040 points
Part Number: LM7322

Hi TI expert

I am trying to simulate LM7322 in TINA in a buffer configuration supporting capacitive load of 1nF. The datasheet says it can support capacitive loads of large values. But the transient response to a step input signal shows a significant overshoot and bode plot shows significant AC peaking. Converting these overshoots gives me a PM of less than 10 degrees, which is a very unstable system.

I have attached screenshot of circuit configuration I used, transient response to step input and bode plot. Is there anything wrong with my implementation or the way I am interpreting my results?

  • 0
    TI__Genius 15410 points

    Hi Li,

    What is C1 and R1 for? With the op amp in a buffer configuration (short from IN- to Out) R1 will appear as a resistor in series with the open loop output impedance making the stability worse. Please remove C1 and R1.

    With a 1nF cap load the datasheet shows about 25 degrees of phase margin which means you could see about 50% overshoot. After removing the components I suggest running the simulation from 9us to 15us this will give you more data points to capture in the area of the waveform you are interested in.

    Lastly, the model was created about 10 years ago so there might be some slight differences between the model and real life silicon. 

    Thank you,

    Tim Claycomb