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OPA2890: Op-amp operation during shutdown has high Vout

Part Number: OPA2890

Hi, I am working for SARADC single input for ATE testing with multiple DUT (with multiple ADC input in one DUT as picture). I am seeking help if the circuit i draw is doable and any recommendation appreciated.

SARADC with 20kHz max, the supply i set is -3V Vss and 9V Vdd.

Question :

1) What other recommendation from this circuit can be improve. I am setting the op-amp shutdown pin to device supply so when the DUT power down it will disable the op-amp.

2) When Shutdown bit set to 0V, the op-amp output seen at 2.33V, this will causing latch-up since the DUT is powered down. Does the op-amp behaving this? any improvement i can make? or suggestion. i am avoiding using relay after op-amp as we have thousand of relays to control.