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TDA3XEVM: issue of gpmc prefetch mode to drive nand flash

Part Number: TDA3XEVM

Good day ,Sir

we use tda3x GPMC to control the NAND flash(micron MT29F1G08ABAEAWP)

,now we can read / program / erase NAND flash with CPU mode .(process byte to byte)

but we want to try to drive with gpmc prefetch mode . after coding but not working 

, may pls ask for a sample code which include prefetch mode(may be include DMA/Interrupt config)  control  for reference ?

or what should i prepare for you .

so appreciate for your help

tks

Brianyeh

  • Hi,

    I have forwarded your question to an expert for comment.

    Regards,
    Yordan
  • Hi,

    What is the software package that you are using?
    Please provide more details on the board you are using as EVM doesn't have NAND Flash.

    Regards,
    Rishabh
  • https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/nandflash.7zDear Rishabh,

    yes, we use tda3x to develop , there is not have NAND flash code . but we add it

    C:\PROCESSOR_SDK_03_00_00_00\ti_components\drivers\pdk_01_07_00_16\packages\ti\boot\sbl_auto\nandflash

    attached show the code for you confirm ,

    initial code in NANDOpen() to select the  nandInfo->opMode= DMA mode  not working .

    now we want  it workable .

    Regards,

    Brianyeh

  • Dear Rishabh
    previous attached nandflash code can workable on nandInfo->opMode = CPU mode .
    we want it work also on DMA mode .

    may pls help confirm about the DMA/ Interrupt / prefetch config correct or not , due to currently is always 0 while get the status in ISR function

    static void Edma3CompletionIsr(void)
    {
    :
    isIPR = EDMA3GetIntrStatus(EDMA_TPCC_BASE_ADDR);
    isIPRH = EDMA3IntrStatusHighGet(EDMA_TPCC_BASE_ADDR);
    :
    :
    }

    Regards,
    Brianyeh
  • Dear Rishabh
    sorry for i am junior on TI , if what you need me to provide the more detail for you understand what my question ,may pls let me know .
    appreciate for you great support .
    Brianyeh
  • Hi Brian,

    I went through the code. It seems that the problem is with interrupt crossbar configuration.

    While doing XBAR configuration you are using DSP CPU Id.

    It should be IPU i.e. CSL_XBAR_IRQ_CPU_ID_IPU1.

    Kindly modify it and try.

    Regards,

    Rishabh

  •  Dear Rishabh

    thanks for your reply
    i have a confuse about the spec like attached page 4085 , mention that
    GPMC_IRQ  >> IRQ_CROSSBAR_15 >> DSP1_IRQ_46 >> GPMC interrupt
    so i use DSP1_IRQ_46 as the interrupt .
    that is my misunderstanding ?

    or do you have any comment for the interrupt number and source ?

    CSL_xbarIrqConfigure(CSL_XBAR_IRQ_CPU_ID_IPU1,

                                                  ?,?); 

    appreciate deeply

    Brianyeh

  • Hi Brian,

    You can connect any interrupt source to any CPU using the crossbar.
    This is the default mapping for DSP1 and DSP2.
    DSP mapping makes connection between GPMC and DSP but we need a connection between GPMC and IPU.
    Hence you need to do the below crossbar mapping:
    GPMC_IRQ >> IRQ_CROSSBAR_15 >> IPU1_IRQ_x >> GPMC interrupt

    Regards,
    Rishabh
  • Dear Rishabh
    thanks a lot , i will try another int source and reply the result .
    appreciate deeply
    Brianyeh
  • Dear Rishabh
    after try CSL_XBAR_IRQ_CPU_ID_IPU1 adn change another interrupt src , then can workable but no data be dumped .
    here have 2 question :
    1, EDMA3DisableTransfer(,,trigMode)
    if trigMode = EDMA3_TRIG_MODE_EVENT , interrupt not happen
    but if trigMode = EDMA3_TRIG_MODE_MANUAL , interrupt can occured .
    may pls describe what different ?

    2, currently no data be read but interrupt occurred , may pls help suggest some to try ?

    deep appreciate
    Brianyeh

  • Hi Brian,

    1. Event trigger is used when one wants EDMA to occur on occurrence of a particular system event. You might need to program DMA crossbar to make a connection between event source and DMA engine. Then only DMA will occur and you will get EDMA completion interrupt.
    2. Usually the issue is with read commands while reading flash memory. As I stated previously I am not aware of the NAND behavior and hence won't be able to pinpoint why the data can't be read.

    Regards,
    Rishabh