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TDA3-Q1: CSI-2 data format configuration for migrating Rader SDK v2.12 to v3.02

Genius 5785 points

Part Number: TDA3-Q1

Hello,

We've developed our system with AWR1243 and TDA3. We're migrating Radar SDK from v2.12 to v3.02.

In Radar SDK v2.12, we got advice from TI to set SYSTEM_CSI2_RAW8 to inCsi2DataFormat.
<RadarSDKv2.12>\vision_sdk\examples\tda2xx\src\radar\src\common\chains_common_ar12xx.c

In Radar SDK v3.02, I think SYSTEM_CSI2_RAW8 should be set like v2.12.
<RadarSDKv3.02>\vision_sdk\apps\src\rtos\radar\src\common\chains_common_ar12xx.c

In v3.02, SYSTEM_CSI2_RAWx seems to be determined depending on the ADC data format (12, 14 and 16-bit). (By the way, the A2D resolution of AWR1243 is 12-bit, I'm not sure that meaning.)

Should I set "#define CHAINS_AR1243_ADC_DATA_FORMAT (16U)" as default and select "#define CHAINS_AR1243_CSI_CAPTURE_DATA_FORMAT (SYSTEM_CSI2_RAW8) / * 16 bit * /" ?

Please give me some advice.

Regards,
Kazu

  • Hi Kazu,

    The AWR1243 has an option to set the output bit width of the ADC samples as part of the .dataFmtCfgArgs..adcBits configuration. Depending on whether it is 12/14/16 the number of bits and the MIPI CSI2 data format used is different.

    In order to make it easier for the same configuration to flow through to the different configurations based on whether you would like to get 12/14/16 bit ADC samples in TDA DDR memory, you can use the following macros:

    /** \brief ADC Data Format for AR12

    *         Valid Values are

    *         12  (for 12 bit ADC)

    *         14  (for 14 bit ADC)

    *         16  (for 16 bit ADC)

    */

    #define CHAINS_AR1243_ADC_DATA_FORMAT (16U)   --> This is what you can modify to 12/14/16 and the rest of the configurations would flow based on the #if conditions below:

    #if (CHAINS_AR1243_ADC_DATA_FORMAT == (12U))

       /** \brief AR12 data format value set in the configuration */

       #define CHAINS_AR1243_DATA_FORMAT_CONFIG (RL_ADC_DATA_12_BIT)       /* 12 bit */

       /** \brief CSI data format configuration */

       #define CHAINS_AR1243_CSI_CAPTURE_DATA_FORMAT  (SYSTEM_CSI2_RAW12)  /* 12 bit */

    #elif (CHAINS_AR1243_ADC_DATA_FORMAT == (14U))

       /** \brief AR12 data format value set in the configuration */

       #define CHAINS_AR1243_DATA_FORMAT_CONFIG (RL_ADC_DATA_14_BIT)       /* 14 bit */

       /** \brief CSI data format configuration */

       #define CHAINS_AR1243_CSI_CAPTURE_DATA_FORMAT  (SYSTEM_CSI2_RAW14)  /* 14 bit */

    #elif (CHAINS_AR1243_ADC_DATA_FORMAT == (16U))

       /** \brief AR12 data format value set in the configuration */

       #define CHAINS_AR1243_DATA_FORMAT_CONFIG (RL_ADC_DATA_16_BIT)       /* 16 bit */

       /** \brief CSI data format configuration */

       #define CHAINS_AR1243_CSI_CAPTURE_DATA_FORMAT  (SYSTEM_CSI2_RAW8)  /* 16 bit */

    #else

       #warn "CHAINS_AR1243: No valid ADC data format specified!!"

    #endif

    Thanks and Regards

    Piyali

  • Hi Piyali,

    Thank you for your quick reply. I have an additional question about that.

    When I set "#define CHAINS_AR1243_ADC_DATA_FORMAT (16U)", as SYSTEM_CSI2_RAW8 is effective, I understand that ADC sampling data is 8-bit resolution. Also I think that two 8-bit data will be stored packed in a 16-bit.

    In what order will the two 8-bit RAW data be stored in TDA3 DDR? Is the previous 8-bit data stored in the lower 8 bits and the next 8-bit data stored in the upper 8 bits? Or reverse order? Please also tell me about the document or something of the order information.

    Regards,
    Kazu

  • Hi Kazu,

    The AWR1243 adc chain (post noise shaping + decimation) is always sending 16 bit data, and the data format block drops the LSBs to make it 14/12 bits. e2e.ti.com/.../614500

    So when we set the CHAINS_AR1243_ADC_DATA_FORMAT (16U) the 16 bit ADC value is sent out over CSI. The data is arranged in DDR as 16 bit I data followed by 16 bit Q data.

    The CSI protocol will send it such that the LSB 8 bit of 16 bit I data first, MSB 8 bit of 16 bit I data, LSB 8 bit of 16 bit Q data, MSB 8 bit of 16 bit Q data.

    Thanks and Regards,
    Piyali
  • Hi Piyali,

    Sorry to bother you again.

    I understand the following two cases. Please confirm the attached file. Is my understanding correct? Also, I’m asking E2E mmWave Forum about the orange frame in the file.

    Case 1: Of the 16-bit of the ADC chain, the upper 12-bit is valid data, and this data is output with RAW12 of CSI2, and this 12-bit data is valid in DDR of TDA 3. The part of the red frame corresponds to the red frame in Figure 6-5 of AWR1243 datasheet.

    Case 2: The 16-bit of the ADC chain is valid data, this data is output twice with RAW8 of CSI2, and this 16-bit data is valid in DDR of TDA3. I'm thinking about the orange frame.

    AWR1243-CSI2-RAW8.xlsx

    Regards,

    Kazu

  • Hi Kazu,

    The way the orange frames would work is as below:
    1. Chirp profile is finally a 32 bit number with the fields:

    First CSI Byte:
    Channel Number [1:0]
    Profile Number [3:0]
    Reserved[7:0]

    Second CSI Byte:
    Reserved[15:8]

    3rd CSI Byte:
    Chirp Number[7:0]

    4th CSI Byte:
    Chirp Number[11:8]
    Reserved1 [3:0]

    2. Chirp Quality will come byte by byte. In figure 6-5 of the AWR1243 data sheet you would see this getting split every 12 bits.

    Thanks and Regards,
    Piyali