This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Linux/AM5708: Ethernet PHY issue

Part Number: AM5708


Tool/software: Linux

I am bringing up Broadcom's BCM5461 Ethernet Phy on my custom AM5708 board.

This is snippet of my current top-level device tree (which includes dra72-evm-common.dtsi):

&mac {                                                                                                                                                                                                                                                                                    
        slaves = <1>;                                                                                                                                                                                                                                                                     
        status = "okay";                                                                                                                                                                                                                                                                  
};                                                                                                                                                                                                                                                                                        
                                                                                                                                                                                                                                                                                          
&cpsw_emac0 {                                                                                                                                                                                                                                                                             
        phy-handle = <&PHY0>;                                                                                                                                                                                                                                                             
        //phy-handle = <&davinci_mdio>, <0>;                                                                                                                                                                                                                                              
        phy-mode = "rgmii";                                                                                                                                                                                                                                                               
};                                                                                                                                                                                                                                                                                        
                                                                                                                                                                                                                                                                                          
&davinci_mdio {                                                                                                                                                                                                                                                                                                   
status = "ok";
PHY0: ethernet-phy@0 {
compatible = "brcm,bcm5461", "ethernet-phy-ieee802.3-c22"; //compatible = "ethernet-phy-ieee802.3-c22"; //interrupt-parent =<&gpio2>; //interrupts = <1 IRQ_TYPE_LEVEL_LOW>; reg = <0>; reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>; reset-delay-us = <2>; reset-assert-us = <1000>; reset-deassert-us = <2000>; }; };

And this is the boot log:

Arago 2017.10 am57xx-evm ttyS2

am57xx-evm login: root
root@am57xx-evm:~# dmesg | grep -i 'mdio\|eth\|net'                                                                                                           
[    0.131672] NET: Registered protocol family 16
[    1.661284] NET: Registered protocol family 2
[    1.662275] NET: Registered protocol family 1
[    4.601795] libphy: Fixed MDIO Bus: probed
[    4.661657] davinci_mdio 48485000.mdio: davinci mdio revision 1.6
[    4.667783] libphy: 48485000.mdio: probed
[    4.684113] davinci_mdio 48485000.mdio: phy[0]: device 48485000.mdio:00, driver unknown
[    4.692699] cpsw 48484000.ethernet: Detected MACID = 64:cf:d9:8d:6e:cc
[    4.699319] cpsw 48484000.ethernet: device node lookup for pps timer failed
[    4.706396] cpsw 48484000.ethernet: cpts: overflow check period 500 (jiffies)
[    4.943830] NET: Registered protocol family 10
[    4.962190] NET: Registered protocol family 17
[   11.102119] net eth0: initializing cpsw version 1.15 (0)
[   11.102126] cpsw 48484000.ethernet: initialized cpsw ale version 1.4
[   11.102132] cpsw 48484000.ethernet: ALE Table size 1024
[   11.177424] Generic PHY 48485000.mdio:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=48485000.mdio:00, irq=-1)
[   11.340255] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[   11.454892] NET: Registered protocol family 31
[   15.449273] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx
[   15.588341] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[   16.123265] NET: Registered protocol family 15
[   16.672846] Initializing XFRM netlink socket
root@am57xx-evm:~# ifconfig
eth0      Link encap:Ethernet  HWaddr 64:CF:D9:8D:6E:CC  
          inet6 addr: fe80::66cf:d9ff:fe8d:6ecc%763860/64 Scope:Link
          UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:37 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000 
          RX bytes:0 (0.0 B)  TX bytes:6849 (6.6 KiB)
          Interrupt:85 

lo        Link encap:Local Loopback  
          inet addr:127.0.0.1  Mask:255.0.0.0
          inet6 addr: ::1%763860/128 Scope:Host
          UP LOOPBACK RUNNING  MTU:65536  Metric:1
          RX packets:243 errors:0 dropped:0 overruns:0 frame:0
          TX packets:243 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1 
          RX bytes:18552 (18.1 KiB)  TX bytes:18552 (18.1 KiB)

root@am57xx-evm:~# ifup eth0 
udhcpc (v1.24.1) started
Sending discover...
Sending discover...
Sending discover...
Sending discover...
Sending discover...
Sending discover...
Sending discover...
Sending discover...
Sending discover...

In short, the PHY does not seem to work at all. It fails to acquire an IP (whether DHCP or Static).

Pointers would be appreciated!

  • You need to install a driver for your PHY:

    [ 4.684113] davinci_mdio 48485000.mdio: phy[0]: device 48485000.mdio:00, driver unknown
  • Hi Biser, thanks for a quick response. I already have built the driver with "CONFIG_BROADCOM_PHY" which supports BCM5411, BCM5421, BCM5461, BCM54616S, BCM5464 and etc.
  • Hi,

    Referencing your DTS snippett, how is PHY0 defined?

    &cpsw_emac0 {
    phy-handle = <&PHY0>;
    //phy-handle = <&davinci_mdio>, <0>;
    phy-mode = "rgmii";
    };

    Could you also please attach the output of ethtool eth0 and ethtool -S eth0?

    Best Regards,
    Schuyler
  • PHY0 is defined in davinci_mdio as per the original post above. Formatting is screwed up, so you need to scroll to the right. Here is the node again:

    &davinci_mdio { 
         status = "ok"; 
         PHY0: ethernet-phy@0 { 
    compatible = "brcm,bcm5461", "ethernet-phy-ieee802.3-c22"; //compatible = "ethernet-phy-ieee802.3-c22"; //interrupt-parent =<&gpio2>; //interrupts = <1 IRQ_TYPE_LEVEL_LOW>; reg = <0>; reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>; reset-delay-us = <2>; reset-assert-us = <1000>; reset-deassert-us = <2000>; }; };

  • Output of ethtool eth0 and ethtool -S eth0:

    root@am57xx-evm:~# ethtool eth0
    Settings for eth0:
    Supported ports: [ TP AUI BNC MII FIBRE ]
    Supported link modes: 10baseT/Half 10baseT/Full 
    100baseT/Half 100baseT/Full 
    1000baseT/Half 1000baseT/Full 
    Supported pause frame use: No
    Supports auto-negotiation: Yes
    Advertised link modes: 10baseT/Half 10baseT/Full 
    100baseT/Half 100baseT/Full 
    1000baseT/Half 1000baseT/Full 
    Advertised pause frame use: No
    Advertised auto-negotiation: Yes
    Link partner advertised link modes: 10baseT/Half 10baseT/Full 
    100baseT/Half 100baseT/Full 
    1000baseT/Full 
    Link partner advertised pause frame use: Symmetric
    Link partner advertised auto-negotiation: Yes
    Speed: 1000Mb/s
    Duplex: Full
    Port: MII
    PHYAD: 0
    Transceiver: external
    Auto-negotiation: on
    Supports Wake-on: d
    Wake-on: d
    Current message level: 0x00000000 (0)
    
    Link detected: yes
    
    root@am57xx-evm:~# ethtool -S eth0
    NIC statistics:
    Good Rx Frames: 463
    Broadcast Rx Frames: 0
    Multicast Rx Frames: 463
    Pause Rx Frames: 0
    Rx CRC Errors: 0
    Rx Align/Code Errors: 0
    Oversize Rx Frames: 0
    Rx Jabbers: 0
    Undersize (Short) Rx Frames: 0
    Rx Fragments: 0
    Rx Octets: 43493
    Good Tx Frames: 51
    Broadcast Tx Frames: 13
    Multicast Tx Frames: 38
    Pause Tx Frames: 0
    Deferred Tx Frames: 0
    Collisions: 0
    Single Collision Tx Frames: 0
    Multiple Collision Tx Frames: 0
    Excessive Collisions: 0
    Late Collisions: 0
    Tx Underrun: 0
    Carrier Sense Errors: 0
    Tx Octets: 10226
    Rx + Tx 64 Octet Frames: 240
    Rx + Tx 65-127 Octet Frames: 203
    Rx + Tx 128-255 Octet Frames: 42
    Rx + Tx 256-511 Octet Frames: 29
    Rx + Tx 512-1023 Octet Frames: 0
    Rx + Tx 1024-Up Octet Frames: 0
    Net Octets: 53719
    Rx Start of Frame Overruns: 0
    Rx Middle of Frame Overruns: 0
    Rx DMA Overruns: 0
    Rx DMA chan 0: head_enqueue: 1
    Rx DMA chan 0: tail_enqueue: 127
    Rx DMA chan 0: pad_enqueue: 0
    Rx DMA chan 0: misqueued: 0
    Rx DMA chan 0: desc_alloc_fail: 0
    Rx DMA chan 0: pad_alloc_fail: 0
    Rx DMA chan 0: runt_receive_buf: 0
    Rx DMA chan 0: runt_transmit_bu: 0
    Rx DMA chan 0: empty_dequeue: 0
    Rx DMA chan 0: busy_dequeue: 0
    Rx DMA chan 0: good_dequeue: 0
    Rx DMA chan 0: requeue: 0
    Rx DMA chan 0: teardown_dequeue: 0
    Tx DMA chan 0: head_enqueue: 51
    Tx DMA chan 0: tail_enqueue: 0
    Tx DMA chan 0: pad_enqueue: 0
    Tx DMA chan 0: misqueued: 0
    Tx DMA chan 0: desc_alloc_fail: 0
    Tx DMA chan 0: pad_alloc_fail: 0
    Tx DMA chan 0: runt_receive_buf: 0
    Tx DMA chan 0: runt_transmit_bu: 0
    Tx DMA chan 0: empty_dequeue: 51
    Tx DMA chan 0: busy_dequeue: 0
    Tx DMA chan 0: good_dequeue: 51
    Tx DMA chan 0: requeue: 0
    Tx DMA chan 0: teardown_dequeue: 0

  • This is the pinmux for RGMII. Do I need MANUAL_MODE?

            {VIN2A_D2, (M10 | PIN_OUTPUT)}, /* vin2a_d2.eCAP1_in_PWM1_out */                                                                                                                                                                                                                  
            {VIN2A_D10, (M11 | PIN_OUTPUT_PULLDOWN)},       /* vin2a_d10.pr1_mdio_mdclk */                                                                                                                                                                                                    
            {VIN2A_D11, (M11 | PIN_INPUT)}, /* vin2a_d11.pr1_mdio_data */                                                                                                                                                                                                                     
            {VIN2A_D12, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},  /* vin2a_d12.rgmii1_txc */                                                                                                                                                                                                
            {VIN2A_D13, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},  /* vin2a_d13.rgmii1_txctl */                                                                                                                                                                                              
            {VIN2A_D14, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},  /* vin2a_d14.rgmii1_txd3 */                                                                                                                                                                                               
            {VIN2A_D15, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},  /* vin2a_d15.rgmii1_txd2 */                                                                                                                                                                                               
            {VIN2A_D16, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},  /* vin2a_d16.rgmii1_txd1 */                                                                                                                                                                                               
            {VIN2A_D17, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},  /* vin2a_d17.rgmii1_txd0 */                                                                                                                                                                                               
            {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin2a_d18.rgmii1_rxc */                                                                                                                                                                                                
            {VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},   /* vin2a_d19.rgmii1_rxctl */                                                                                                                                                                                              
            {VIN2A_D20, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},     /* vin2a_d20.rgmii1_rxd3 */                                                                                                                                                                                               
            {VIN2A_D21, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},     /* vin2a_d21.rgmii1_rxd2 */                                                                                                                                                                                               
            {VIN2A_D22, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},     /* vin2a_d22.rgmii1_rxd1 */                                                                                                                                                                                                       
            {VIN2A_D23, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},     /* vin2a_d23.rgmii1_rxd0 */                                                                                                                                                                                                       
            {VOUT1_FLD, (M14 | PIN_OUTPUT)},        /* vout1_fld.gpio4_21 */                          

  • Switching to 100Mb from 1Gb was the trick. At 100Mb connection, it can now acquire IP as well as ping an address. Does this imply timing issue arising from PCB layout?

  • Hi,

    A possible indicator of a board layout issue is non-zero CRC errors and or code/align errors. The posted output of ethtool -S is not showing that. Where is the pin mux defined in the one of the previous posts?

    Best Regards,
    Schuyler
  • I see. The pinmux from the previous post came from board/ti/am57xx/mux_data.h from TI U-Boot 2017.01.
  • Hi,
    The pin mux file shown is the correct place. Did you review the iodelay settings for the selected ethernet interface?

    Best Regards,
    Schuyler
  • Let me check iodelay settings. The values should come from physical trace length, correct?
  • Hi,
    The iodelay for certain pins is one of the outputs from the pin mux tool, it it not related to board trace length. The pin delay value depending which pin is muxed will affect an internal timing value to the SOC on certain high speed interfaces such as Ethernet. Here is an application note in case you have not seen already that describes the process on deriving the io delay values.

    www.ti.com/.../sprac44a.pdf


    Best Regards,
    Schuyler
  • Part Number: AM5708

    Tool/software: Linux

    This is in continuation of my previous post here. I applied the IODelay using the output from the TI pin-mux utility but the issue remains.

    Again, 100Mbit connection works fine, but 1Gbit never gets an IP leased.

    Is there anything else I can check from kernel / rootfs persective?  

  • Hi,

    Please attach a schematic snippet showing the PHY connection to the processor, and the updated iodelay value array for this interface. How are you switching to 1G? Are you connecting a 1G capable link partner or are you doing something else?

    Best Regards,
    Schuyler
  • I am connecting the board to 1G capable switch. I checked devices like my laptop can get 1Gbit connection on this setup.  Here is the updated IO Delay values:

    +const struct iodelay_cfg_entry iodelay_cfg_array_solix8[] = {
    +       {0x714, 134     ,1786   }, /* CFG_RGMII0_RXD1_IN        N3 */ 
    +       {0x720, 40      ,1966   }, /* CFG_RGMII0_RXD2_IN        P1 */
    +       {0x72C, 0       ,2057   }, /* CFG_RGMII0_RXD3_IN        N1 */
    +       {0x708, 3       ,1721   }, /* CFG_RGMII0_RXD0_IN        N4 */
    +       {0x758, 0       ,60     }, /* CFG_RGMII0_TXD0_OUT       R1 */
    +       {0x764, 0       ,0      }, /* CFG_RGMII0_TXD1_OUT       R2 */
    +       {0x770, 0       ,60     }, /* CFG_RGMII0_TXD2_OUT       P3 */
    +       {0x77C, 0       ,120    }, /* CFG_RGMII0_TXD3_OUT       P4 */
    +       {0x740, 0       ,60     }, /* CFG_RGMII0_TXC_OUT        T4 */
    +       {0x74C, 0       ,60     }, /* CFG_RGMII0_TXCTL_OUT      T5 */
    +       {0x6F0, 413     ,0      }, /* CFG_RGMII0_RXC_IN N2         */
    +       {0x6FC, 27      ,2296   }, /* CFG_RGMII0_RXCTL_IN       P2 */
    +};
    +
    +
    

  • Hi,

    Is the ethtool -S eth0 showing the packet TX or RX count going up when connected at 1G? The packets leaving the PHY need to be verified, if they are. Are you directly connected to a PC that can run wireshark?

    Best Regards,
    Schuyler