PCM1801: I2S audio data format

Kai Nomiyama

Part Number: PCM1801

Hi Team,

I have a question about PCM1801 I2S format.

[32-BCK/LRCK]

Datasheet page14 "SERIAL AUDIO DATA INTERFACE" describes "PCM1801 accepts the 64-BCK/LRCK or 48-BCK/LRCK format (only for a 384-fS system clock) for I2S format.".

When I take a look at Figure 25. Audio Data Format, it seems PCM1801 supports 32-BCK/LRCK but why PCM1801 doesn't accept 32-BCK/LRCK?

I2S protocol actually includes a 1 BCLK cycle delay between the LRCK edge and the start of data, so in other words can we say PCM1801 accepts the 32 + 2 BCK/LRCK for I2S format?

[POWER-ON RESET]

it is difficult to follow figure 24. internal power-on reset timing especially "the system clock must be supplied as soon as power is applied; more specifically, the device must receive at least three system clock cycles before VDD > 4 V. While VCC/VDD < 4 V (typical)".

Customer power up sequence is below.

wait approx. 7ms after 5V supplies then system clock supplies.

Question here is

#1: Are there any concern about this power up sequence?

#2: In below power up sequence with I2S mode, when should we set FMT to "H"? after 1024 system clocks from first edge?

Regards,

Kai

over 4 years ago

0 Carson Allen over 4 years ago

TI__Genius 13610 points

Hello Kai,

Let me look into datasheet to understand further and I will respond back within 48 hours.

Thanks,

Carson

Low Power Audio Engineer

0 Carson Allen over 4 years ago in reply to Carson Allen

TI__Genius 13610 points

Hello Kai,

I would not use Figure 25 as reference to what ratio device can support, it is generic way to explain different format types.

You should provide clocks before power-up.

You can set FMT whenever you would like but do it before you want data to be received.

Best regards,

Carson

0 Kai Nomiyama over 4 years ago in reply to Carson Allen

TI__Expert 5625 points

Hi Carson,

regarding below comment, figure 25 is actually doesn't matter. customer question is PCM1801 supports 32-BCK/LRCK for I2S format or not since there is no such comment in datasheet . Does PCM1801 support it?

"I would not use Figure 25 as reference to what ratio device can support, it is generic way to explain different format types."

Regards,

Kai

0 Carson Allen over 4 years ago in reply to Kai Nomiyama

TI__Genius 13610 points

Hello Kai,

No it would only accept for left-justified as it implies.

Best Regards,

Carson

0 Kai Nomiyama over 4 years ago in reply to Carson Allen

TI__Expert 5625 points

Hi Carson,

I summarized my questions in attached pptx file so could you take a look at this and let me know your comment for question 1~4?

PCM1801_Questions.pptx

Regards,

Kai

0 Carson Allen over 4 years ago in reply to Kai Nomiyama

TI__Genius 13610 points

Hi Kai,

Alright I will take a look and reply early next week.

Best Regards,

Carson

0 Kai Nomiyama over 4 years ago in reply to Carson Allen

TI__Expert 5625 points

Hi Carson,

Do you get any comment about pptx?

I got additional questions so I update its slide 5 and 6.

Please let me know every time you got answer about it.

PCM1801_Questions_rev1.pptx

Regards,

Kai

0 Carson Allen over 4 years ago in reply to Kai Nomiyama

TI__Genius 13610 points

Hi Kai,

Thanks for patience Ill take a look at your PPT today and respond by tomorrow!

Best Regards.

Carson

0 Kai Nomiyama over 4 years ago in reply to Carson Allen

TI__Expert 5625 points

Hi Carson,

Any update for this?

Regards,

Kai

0 Carson Allen over 4 years ago in reply to Kai Nomiyama

TI__Genius 13610 points

Hi Kai,PCM1801_Questions_rev1 (1).pptx

I leave comments in blue.

Best Regards,

Carson

0 Kai Nomiyama over 4 years ago in reply to Carson Allen

TI__Expert 5625 points

Hi Carson,

Thank you for your reply.

Let me double check "DATA FORMAT".

In general I2S use-case, LRCLK controls DOUT so we don't need additional 15bit if we change LRCK at the end of 17bit.

Why PCM1801 doesn't support such use case like (1+16)x2BCK/LRCK?

My customer evaluated (1+16)x2BCK/LRCK in Lab and it looks no problem.

If there is any concern about that use case in I2S mode, could you let me know?

One more thing, you said "Vdd and Vcc are same thing" in page 5.

In "Power-on reset" section, it looks below timing is need.

at least 3system clocks --> VDD >4V --> VCC/VDD > 4V --> 1024 system clocks stay resets.

therefore, VCC - VDD doesn't have any sequence but if we supply VCC and VDD as above sequence, what is the concern?

Regards,

Kai

0 Carson Allen over 4 years ago in reply to Kai Nomiyama

TI__Genius 13610 points

Hello Kai,

I believe this is just being overthought too much, if you have no problem the way you are using then proceed, all I can suggest is to follow as it says in datasheet. Using I2S in the way you say would also require the device receiving the I2S in that format to understand or accept that format so there could be problem there. Only concern for sequence is if there is clock error device would just have to be reset.

Best Regards,

Carson

Audio

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PCM1801: I2S audio data format