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PCM1865: 20KHz frequency response at fs=96KHz

Part Number: PCM1865

Hello,

On the datasheet Decimation filter pass band specification is +/- 0.05dB at 0.454fs.

However, when enabling PGA, it looks another parameter is involved.

Attached is frequency response measurement at +31.5dB and +32dB setting at Fs 96KHz, this point might have unique characteristics on PGA, as same as previous Gain error discussion.

At 20KHz -1dB LPF characteristics is shown at +32dB.

How can we improve this matter, this time our customer removed 100Kohm resister between GND and input pin.

Regards,

Mochizuki

  • Hi Mochizuki-san,

    It appears that frequency response is OK at 31dB gain and not good at 32dB, is that correct?

    This device does have some degraded performance at 32dB gain as shown in the datasheet, which might be the reason behind this performance. It's also possible the input signal is starting to clip at 32dB and causing undesired effects. Are you able to check the THD+N vs frequency to verify?

  • Hi Brian,

    Thank you for your reply.

    That is correct, even 31.5dB PGA setting frequency response is good, but at 32dB drastically degrade 20KHz response, it is verified on the EVM too. Also SNR and THD is not good as another PGA gain setting.

    Our customer wants to know the reason why just 32dB PGA setting bring such a 20KHz response?

    Is it the device performance itself even there is no specification on the datasheet ?

    Regards,

    Mochizuki

  • In my response above, you can see that the device SNR and THD+N is specified to degrade at 32dB gain, per the datasheet. Is there a reason that 31.5dB is not acceptable to use as a gain?

  • Hi Brian,

    Thank you for prompt reply.

     

    The project is still early stage of development, one of the solution is limit the maximum PGA gain at 31.5dB.

    Our customer wants to know the reason why PCM186x PGA has such a performance degradation include 20KHz frequency response.

    I will communicate them that this PGA performance is design limitation but could not show internal schematic level root cause.

    Is this understanding correct?

     

    Regards,

    Mochizuki

  • Yes, that is correct.