Tool/software:
We are constrained by using I2S with a non-standard FSYNC = 46.875 kHz. The device is required to be in slave mode. Thus, the I2S bus is created (on a custom board not EVM) with a BCLK of 3MHz.
This is not working whether we use the auto clock config or not. I have used the PPC3 application to configure the clocks manually, but the output seems to be garbage. This makes sense given the fact that the registers to change the clock dividers are not even given to the user.
Is it possible to use this frequency with this ADC in slave mode? If so, how can it be achieved?
Any guidance would be appreciated.
Thanks in advance.
