Tool/software:
The datasheet does not mention what an appropriate range is for the nominally 2.2uF caps used on the VNEG and CAPM-CAPP pins.
Would say a 4.7uF cap that derates to around 2.2uF under DC Bias be acceptable or is there such a thing as too much capacitance here?
(Trying to do a bit of BOM optimization on a design)
