TSC2004: POR

Part Number: TSC2004

Tool/software:

Hi,

I have a question about resetting the power supply.

1. When the power-off time is 300ms or less, the PINTDAV does not become High and the TSC2004 does not operate. Is this cause related to "Table 1. Recommended Power Cycle Timings "in the POR document? This problem occurs about 50% of the time.

https://www.ti.com/jp/lit/an/sbaa193/sbaa193.pdf

2. If so, is the sequence in "Table 5. Case 1: TSC2004 AD0 Pin is Connected to '0' " effective as a countermeasure to set the PINTDAV to High? 

3. If so, can Step3 be omitted? It is difficult to execute Step3 due to the customer's circuit design. If possible, I would like to do "Step 1→2→4→ ..."

TSC2004.pptx

Best Regards,

Nishie

  • Hi Nishie-san,

    Today is a U.S. holiday. Please be patient as our team follows up with you tomorrow.

    Thank you!
    Jeff McPherson

  • Hi Jeff-san,

    Thank you for your support.

    I look forward to hearing from you tomorrow.

    Best Regards,

    Nishie

  • Hi Jeff-san,

    After turning the power off and on again, I followed the steps below and this problem was solved.

    I checked D7 of Status Register and performed software processing. Is there any case that D7 does not become 1 when turning the power off and on again? Please let me know if there is any problem with this procedure.

    <steps>

    Step1→Step2→Check whether D7 of the Status Register is 1. If it is 1, go to Step4.→Step4→Step7→Step8

    Best Regards,

    Nishie

  • Hi Yuta,

    1. Yes this is related to Power sequence. The table states if power off time is shorter than 200ms (normal) or 1.2ms (cold) the internal reset capacitor may not fully discharged.

    2. Table 5 sequence should force a reset if the power cycle time is too short. Your proposed flow is good:

    Step 1->Step2-> read Status and check D7

    If D7=1, then Step 4->Step7->Step8

    If D7=0, continue normal initialization

    3. Step 3 is optional but if RESET is only pulled up by a resistor. If host drives RESET directly, step 3 can be omitted, otherwise keep it.

    You may be able to enforce the datasheet off time with a simple load/bleeder resistor so SNSVDD reaches 0V between cycles.