TLV320DAC3101: Not able to generate BEEP in TLV320DAC3101.

/*DAC register setting implementation implementation
 * Function name :DAC TLV320DAC3101 related
 * By:Vikram.R
 * Description :This code is used for register setting of TLV320DAC3101
 * Mode:Master, Codec interface: i2s, Word length: 16, MCLK of 16MHz and DIN given from FPGA
 *
 */

#include <common.h>
#include <command.h>
#include <i2c.h>

#define DAC_I2C_ADDR 0x18

#define DAC_SW_RESET 0x01
#define PLL_CLKIN_CODEC_CLKIN 0x03
#define PLL_POWER_P_R 0x91
#define DAC_PLLJ 0x05
#define DAC_D_MSB 0x0E
#define DAC_D_LSB 0xB0
#define DAC_NDAC 0x82
#define DAC_MDAC 0x87
#define DAC_DOSR_MSB 0x00
#define DAC_DOSR_LSB 0x80
#define DAC_CODEC_IF_CNTRL 0x0l
#define DAC_PRB_SELECT 0x19


void dac_i2c_write(uchar , uchar);


void dac_tisbc_setup()
{
	
	dac_i2c_write(0x0, 0x0); /*Set register page to 0*/
	dac_i2c_write(0x1, DAC_SW_RESET); /*Initiate SW reset (PLL is powered off as part of reset)*/
	dac_i2c_write(0x4, PLL_CLKIN_CODEC_CLKIN); /*PLL_clkin = MCLK,codec_clkin = PLL_CLK*/
	dac_i2c_write(0x5, PLL_POWER_P_R);/*PLL Power up, P = 1, R = 1 */
	dac_i2c_write(0x6, DAC_PLLJ);/*J = 5*/
	dac_i2c_write(0x7, DAC_D_MSB);/*D=3760=>0x0EB0*/
	dac_i2c_write(0x8, DAC_D_LSB);/*D=3760=>0x0EB0*/
	dac_i2c_write(0x0B,DAC_NDAC);/*NDAC is powered up and set to 2*/
	dac_i2c_write(0x0C,DAC_MDAC);/*MDAC is powered up and set to 7*/
	dac_i2c_write(0x0D,DAC_DOSR_MSB);/*DOSR MSB is 0*/
	dac_i2c_write(0x0D,DAC_DOSR_LSB);/*DOSR LSB is 0x80 => DOSR value is 128*/
	
	dac_i2c_write(0x1B,0x0C);/*mode is i2s, wordlength is 16, master mode*/
	dac_i2c_write(0x3C, 0x19); /*select processing block PRB_P25*/
	dac_i2c_write(0x00, 0x08); /*Select Page 8*/
	dac_i2c_write(0x01, 0x04); /*Adaptive filtering anabled in DAC processing block*/
	dac_i2c_write(0x00, 0x00); /*Change to page 0 */

	/* BEEP Settings*/
	dac_i2c_write(0x47,0x83); /* vol of -1dB Left */
	dac_i2c_write(0x48, 0x43);/* vol of -1dB Right*/
	dac_i2c_write(0x49, 0x03);/*BEEP length MSB*/
	dac_i2c_write(0x4A, 0xC9);/*BEEP length Middle*/
	dac_i2c_write(0x4B, 0x80);/*BEEP length LSB*/
	dac_i2c_write(0x4C, 0x10);/*Sine Coeff*/ 
	dac_i2c_write(0x4D, 0xD8);/*Sine Coeff*/
	dac_i2c_write(0x4E, 0x7E);/*Cosine Coeff*/
	dac_i2c_write(0x4F, 0xE3);/*Cosine Coeff*/

	
	dac_i2c_write(0x74, 0x80);/*volume control thru pin enable*/
	
	/*Program analog blocks*/
	dac_i2c_write(0x00, 0x01);/*Set register page to 1*/
	dac_i2c_write(0x1F, 0x04);/*Program common-mode voltage (defalut = 1.35 V) */
	dac_i2c_write(0x21, 0x4E);/*De-pop, Power on = 800 ms, Step time = 4 ms */
	dac_i2c_write(0x23, 0x44);/*LDAC routed to HPL out, RDAC routed to HPR out*/
	dac_i2c_write(0x28, 0x06);/*Unmute HPL, set gain = 0 db*/
	dac_i2c_write(0x29, 0x06);/*Unmute HPR, set gain = 0 dB*/
	dac_i2c_write(0x2A, 0x1C);/*Unmute Class-D Left, set gain = 18 dB*/
	dac_i2c_write(0x2B, 0x1C);/*Unmute Class-D Right, set gain = 18 dB*/
	
	/*Power up output drivers*/
	dac_i2c_write(0x1F, 0xC2);/*HPL and HPR powered up*/
	dac_i2c_write(0x20, 0xC6);/*Power-up Class-D drivers*/
	dac_i2c_write(0x24, 0x92);/*Enable HPL output analog volume, set = -9 dB*/
	dac_i2c_write(0x25, 0x92);/*Enable HPR output analog volume, set = -9 dB*/
	dac_i2c_write(0x26, 0x92);/*Enable Class-D Left output analog volume, set = -9 dB*/
	dac_i2c_write(0x27, 0x92);/*Enable Class-D Right output analog volume, set = -9 dB*/

	/*Power up DAC*/
	dac_i2c_write(0x00, 0x00);
	dac_i2c_write(0x3F, 0xD4);/*Powerup DAC left and right channels (soft step enabled)*/
	dac_i2c_write(0x41, 0xD4);/*DAC Left gain = -22 dB*/
	dac_i2c_write(0x42, 0xD4);/*DAC Right gain = -22 dB*/
	dac_i2c_write(0x40, 0xD4);/*Unmute DAC left and right channels*/
	/**/

}	

void dac_i2c_write(uchar reg, uchar val)
{
	uchar *buf;
	buf = &val;
	i2c_write(DAC_I2C_ADDR, reg, 0x0, buf, 0x01);
	i2c_read(DAC_I2C_ADDR, reg, 0x0, buf, 0x01);
	printf("\n Value %s written at register %s ", *buf, reg);
}