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PCM1792A: asymetrical distortion results

Alain Chambron1
Prodigy 170 points

Part Number: PCM1792A
Other Parts Discussed in Thread: OPA1612, OPA2227, PCM1794A

Hello,

I am using the PCM1792A in monaural mode. I am experiencing a very steep rise of the distortion on only one of the side of a given DAC. For example, the plots below shows in blue the output of IOUTL-and IOUTL+ for both the THD+N level and ratio, where as the red plots show the same datas for the IOUTR- and IOUTR+. As a result, the THD+N ratio @  0 dBFS input is ~111 dB on one side of the DAC and -97 dB on the other side. As the device operates in monaural, both sides are supposed to process the same input data which is in this case a 1kHz signal with the input level ranging from -30 dB to 0dBFS. What can cause such a different behaviour between channels on a single IC?

  • 0
    TI__Guru 56933 points
    Hi Alain,

    That is a strange behavior. While it might be expected to see some slight variation from device to device, this is abnormal. Do you think you could share your schematic with me? Is it possible that there is flaw in the board assembly that could affect one channel?

    Thanks!
    Paul
  • 0 in reply to Paul_Frost
    Prodigy 170 points

    Hello,

    See the relevant portion of the schematics and layout attached. The op amps actually mounted on the board are OPA1612 instead of OPA2227 as shown in the schematics. The blue curves are measured on JP2 and the reds on JP3. I will double check again the PCB assembly and the second channel as well.

    regards,

    Alain

    dac asymmetry.pdf

  • 0 in reply to Paul_Frost
    Prodigy 170 points

    Hello,

    I tried the other pcm1792a that drives the right channel and I get similar results (see plot below). I have disabled the monaural mode and it did not change either.  The board assembly looks OK.

  • 0 in reply to Alain Chambron1
    TI__Guru 56933 points
    Hi Alain,

    Can you verify if either channels are oscillating with an oscilloscope? Do you see any high level noise on either opamp outputs?

    Thanks!
    Paul
  • 0 in reply to Paul_Frost
    Prodigy 170 points
    Hello,

    There is no oscillation or noise, but what I can see is a rather large DC of -3.6V on the opamp doing the current to voltage conversion.
    If the input is digital full range, the voltage measured for example on JP3.1 or JP3.3 range between -1.32V and -5.92V.
    Is this expected?

    regards,
    Alain
  • 0 in reply to Alain Chambron1
    TI__Guru 56933 points

    Yes, that is expected.  The offset current for the IOUT is 6.2mA.  You I/V stage has a 604Ω resistor, so you could see about -3.75V.  Below is a figure from the PCM1794A PDS, but it is the same for the 1792A as well.

  • 0 in reply to Paul_Frost
    Prodigy 170 points

    Hello,

    here is a view of the routing of the 2 channels with all planes removed. So we can see there are two differences between the corrects L outputs and wrong R outputs:

    - IOUTR- is crossed with IOUTR+ and there are 2 vias on the line,

    - there is a big decoupling capacitor for the power plane connected to the analog power supplies (C190 on the schematics) on the R side, whereas the one positioned on the L side is for the VDD plane (C203)

    Can one of these difference result in degraded THD we see?

    regards,

    Alain

  • 0 in reply to Alain Chambron1
    TI__Guru 56933 points
    Hi Alian,

    I do not think these layout changes would really result in the degraded performance. Have you built more than one of these boards? Were this built by hand? Have you had a chance to thoroughly clean the board of all flux or resin?

    Thanks!
    Paul
  • 0 in reply to Paul_Frost
    Prodigy 170 points

    Hello,

    Multiple boards have been built (5 total), using prototyping services that use automated component placement, the components are soldered using a vapour phase oven, then they are cleaned and visually inspected. I have had now 3 boards under test, and they show similar performances, ie signal to noise ratio of more than 120 dB and THD+N around -105 dB, and similar rise of the distortion at the same input level around -16 dB as described above. Below is another board I have just tested, with curves showing the same pattern although levels are different.

    Ch1 and Ch12 are measured on JP2 and JP4, Ch2 and Ch22 on JP3 and JP5.

    regards,
    Alain

  • 0 in reply to Alain Chambron1
    TI__Guru 56933 points
    Hi Alain,

    How does this measurement look when measure on the single ended outputs on the next stage?
  • 0 in reply to Paul_Frost
    Prodigy 170 points

    Hello,

    see plot below:

  • 0 in reply to Alain Chambron1
    TI__Guru 56933 points
    Hi Alain,

    So this data looks good ~.0003% THDN at FS. I think when you look at each side of the differential output you may be losing any noise-cancelling that could be occurring inside the device.

    Does the output of the differential pair meet your performance expectation?
  • 0 in reply to Paul_Frost
    Prodigy 170 points
    Hello,

    I would agree with this analysis if disabling the monaural mode was fixing this issue. But as I have already tested, this is not the case. Unless the pcm1792a right channel is always expected to be poorer quality than the left one. This is not in the datasheet anyway.

    regards,

    Alain
  • 0 in reply to Alain Chambron1
    TI__Guru 56933 points
    Ok, I may be confused. In your previous post (Jan 31, 2018 11:47 AM) you have two curves, is that not the left channel and right channel? They seem almost exactly the same.

    If you put the part back in mono mode and measure the combined output (differentially) what is the noise?

    I guess my point in general is that your first post - where you measure each IOUT pin individually is not really a valid way to get a proper THD+N measurement as you are almost considering the device to have 4 single ended outputs, which is not case. The reason why differential output pairs are used is to cancel common mode noise in both channels. That is not say there cannot be some minor difference between the noise levels in the right or left channel as well- the device is not truly symmetrical in it layout and design.
  • 0 in reply to Paul_Frost
    Prodigy 170 points

    Hello,

    I had one board reworked to eliminate the signal crossing and vias described in my post from Jan 26, 2018 6:18 AM.
    The dissymmetry disappears and the overall performance is increased with a THD+N reaching -117 dB.

    This would mean that the routing the current driven output lines of the DAC are critical. Do you have an application note with such layout recommendations?

    regards,

    Alain

  • 0 in reply to Alain Chambron1
    TI__Guru 56933 points
    Hi Alain,

    That is a bit of a surprise! The layout is critical, but I felt yours was sufficient. I did not find an app note for this, but I think I might do some experiments and maybe write one :)

    I am happy you found the solution to this anyway,
    Thanks!
    Paul