Hi Sirs,
Sorry to bother you.
We have finished TLV320AIC3204 schematic as below.
Could you help double check it?
Any suggest is welcome.
Thanks!!
Schematic:
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Hi Sirs,
Sorry to bother you.
We have finished TLV320AIC3204 schematic as below.
Could you help double check it?
Any suggest is welcome.
Thanks!!
Schematic:
Hi, Shu-Cheng,
I have looked at your schematic of the AIC3204 and have a couple comments:
Best Regards,
-Diego Meléndez López
Audio Applications Engineer
Hi Sirs,
Thanks for your quick reply
For now, PCM codec connect module is Mono in/out, so we link R/L to codec at same time.
So could you help check our Verb table as below? IN1 is R or L? IN2 is R or L?
# Software Reset ############################################### # # Select Page 0 w 30 00 00 # # Initialize the device through software reset w 30 01 01 # ############################################### # Clock Settings # --------------------------------------------- # The codec receives: BCLK = 2.048 MHz, # , WCLK = 8kHz ############################################### # # Select Page 0 w 30 00 00 w 30 05 23 w 30 04 04 w 30 04 07 w 30 05 A3 w 30 0B 86 w 30 0C 82 w 30 12 86 w 30 13 82 w 30 1C 01 w 30 1B 40 #20141209 Add PLL setting for clock #20141209 PCM=DSP mode, shift 1 bit #20141209 NDAC = 6, MDAC = 2,DOSR/AOSR=128 ############################################### # Signal Processing Settings ############################################### # # Select Page 0 w 30 00 00 # # Set the ADC Mode to PRB_P1 w 30 3d 01 # ############################################### # Initialize Codec ############################################### # # Select Page 1 w 30 00 01 # # Disable weak AVDD in presence of external # AVDD supply w 30 01 08 # # Enable internal LDO w 30 02 01 # # Select ADC PTM_R4 w 30 3d 00 # # Set the input powerup time to 3.1ms (for ADC) w 30 47 32 # # Set the REF charging time to 40ms w 30 7b 01 # ############################################### ############################################### # Recording Setup ############################################### # # Select Page 1 w 30 00 01 # w 30 33 60 # Route IN1L to LEFT_P with 20K input impedance # Route IN1R to RIGHT_P with 20K input impedance_0704 w 30 34 82 # # Route Common Mode to LEFT_M with impedance of 20K w 30 36 80 # # Route IN1R to RIGHT_P with input impedance of 20K w 30 37 80 # # Route Common Mode to RIGHT_M with impedance of 20K w 30 39 80 # # Unmute Left MICPGA, Gain selection of 6dB to make channel gain 0dB # Register of 42dB with input impedance of 20K => Channel Gain of 0dB w 30 3b 54 # # Unmute Right MICPGA, Gain selection of 6dB to make channel gain 0dB # Register of 42dB with input impedance of 20K => Channel Gain of 0dB w 30 3c 54 # # Select Page 0 w 30 00 00 # # Power up LADC/RADC w 30 51 c0 # # Unmute LADC/RADC w 30 52 00 # 20121127 Add ADC volume control to 12dB # 20121128 Change ADC volume to 20dB w 30 53 28 w 30 54 28 #20130110 Add AGC Gain setting Target gain= -5.5dB,Noise Threshold= -90dB,MAx gain=42dB w 30 56 80 w 30 57 3E w 30 58 42 #20150306 change AGC max gain from 42dB to 33dB w 30 5E 80 w 30 5F 3E w 30 60 54 ############################################### # High Performance Stereo Playback # --------------------------------------------- # PowerTune mode PTM_P3 is used for high # performance 16-bit audio. For PTM_P4, # an external audio interface that provides # 20-bit audio is required. # # For normal USB Audio, no hardware change # is required. # # If using an external interface, SW2.4 and # SW2.5 of the USB-ModEVM must be set to # HI and clocks can be connected to J14 of # the USB-ModEVM. # # Audio is routed to both headphone and # line outputs. # Signal Processing Settings ############################################### # # Select Page 0 w 30 00 00 # # Set the DAC Mode to PRB_P8 w 30 3c 08 # ############################################### # Playback Setup ############################################### # # Select Page 1 w 30 00 01 # # De-pop w 30 14 25 # # Route LDAC/RDAC to HPL/HPR w 30 0c 08 08 # # Route LDAC/RDAC to LOL/LOR w 30 0e 08 08 # # Power up HPL/HPR and LOL/LOR drivers w 30 09 3C # # Unmute HPL/HPR driver w 30 10 10 #20150306 Add Gain to 16dB Analog volume w 30 11 10 #20150306 Add Gain to 16dB Analog volume # # Unmute LOL/LOR driver, 0dB Gain w 30 12 00 w 30 13 00 # # Select Page 0 w 30 00 00 # # DAC => DAC to 0dB w 30 41 00 #20150306 Add DAC gain to 0dB Digital volume w 30 42 00 #20150306 Add DAC gain to 0dB Digital volume # # Power up LDAC/RDAC w 30 3f d6 # # Unmute LDAC/RDAC w 30 40 00
Thanks!!
Hi, Shu-cheng,
If ono signal is required, It is recommended to perform the mixing internally, not in hardware. The device features several mixing options in both ADC and DAC.
From the code provided, IN1L is connected to left ADC and IN1R to right ADC.
If the codec is operated in mono operation, why are you using two ADC and two DAC?. It is possible to use a single channel and turn off the unused one. I.E., using only left in and left out will allow you to use a single channel and remove both C75 and C77.
Best Regards,
-Diego Meléndez López
Audio Applications Engineer
Hi Sirs,
Thanks for your reply.
Removed C75 , C77 and update schematic as below.
If have other suggest, please kindly share, Thanks!!
Hi, Shu-Cheng,
Thanks for the feedback. The only other change I can recommend would be to also tie IN2_R to an AC coupled cap to GND like the rest of the unused inputs.
Best Regards,
-Diego Meléndez López
Audio Applications Engineer