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PCM5100A: Intermittent audio output failure

Part Number: PCM5100A

I have designed the PCM5100APW into a new product, and done an initial production run, assembled by professional assembly house in USA. 

I am finding an odd failure mode in greater than 5% of units, and am attempting to understand the issue.

The units that fail output no audio intermittently, sometimes only a blip, other times none.  Then without any good explanation they work properly on the next power cycle.

I am not driving SCK, and allowing the chip to use its internal PLL.  

PIC32 SPI/I2S is set to Left Justified, 24 bit audio.

On one unit I was able to catch in the act on the bench, here was the test procedure.

#1.  No audio was output, even with digital audio input.

#2.  Checked all inputs. XSMT 3.3v, FMT 3.3v, FLT 0, SCK 0, BCK active, DIN active, LRCK active, DEMP 0, all voltages correct on remainder of pins.

#3.  With probe tip pressed on rear of chip(see photo), maybe 1lb pressure, audio immediately starts, releasing pressure, it stops.(This 'fix' works on all failing devices tested so far)

#4.  Power cycled, now audio works fine.

Any suggestions appreciated.

Press point

L1L1

L2-Gnd

L3

L4

L5-Pwr

L6

  • Hi Erik,

    My suspicion is that that this is a manufacturing issue. Have you tried reflowing any of the boards to see if that fixes the issue? Sometimes boards will not be heated enough to fully melt the solder pasta, so some dry joints my cause issues.

    Thanks,
    paul
  • I have pretty much ruled out soldering issues, all joints are fully reflowed, look very nice.  Re soldering each pin doesn't help.  Probing pads all the way through show signal from start to end.  Fine tipped tweezer nudging each pin, etc.

    These parts shipped from Mouser in standard packaging (non dry packing), not sure if that could be a factor or not.

    It is difficult to get good solder joint pictures, but see attached.

  • Some ideas of mine:
    #1. Internal die layout issue
    #2. Internal pin bonding compromised somehow
    #3. Internal PLL not working as designed without SCK
    #4. Other internal latch up, or undiagnosed issue that goes away on power cycle.
  • Hi Erik,

    Let's try a few things:
    When the device is not working, can you confirm the following: voltage on VNEG, voltage on LDOO, voltage on XSMT.
    With the device powered off, please check continuity of the vias under the device to see if any are erroneously shorted together (I have seen solder paste get stuck under devices in the past, leading to shorts on vias).
    What is the value of the inductor L1? Note that the charge pump is switching at about 1.5MHz, so the inductor could be reducing the CPVDD supply.
    What is the voltage rating for C74 and C75? It is critical that these by 2.2uF.
    Latch up cases can be avoided by making sure XSMT is held low during power up. You have a pulldown, but I am not sure of what is driving the 50Ω resistor. You might try measuring the XSMT pin at startup to see if it is being held low.
    What fS are you using in this design?

    Can you get the device to recover without putting pressure on it? Maybe be slightly twisting or bending the board?

    While I would never rule out some internal issue, I will say it is unlikely. This device sells in high volume and I have not hear of any issues from the field.

    Thanks,
    Paul
  • Vneg -3.32 LDO 1.8, XSMT 3.16.

    There just isn't anything shorted.

    L1 is 600 ohm, part BLM18EG601SN1D

    C74 and C75 are 16v, 2.2uf

    A pic32MZ microcontroller operating at 3.3 is driving the 50R resistor.

    Something new to add, without doing anything physical, 44100 samples rates produce audio, 22050 do not.

    For 44100khz audio, BCK = 2.8224915, and the device gets 32 bits per side of the LRCLK
    For 22050khz audio, BCK = 1.4112

    SCK isn't clocked per datasheet assuming PLL handles it.
  • Hi Erik,

    It is import to note that 22.05kHz is not supported by the PCM510xA in three wire mode.  Table 11 in the datasheet shows the supported sample rates.

    The PCM uses an internal oscillator reference to try to detect the input sample rate.  Once it has determined the rate (in one of the above supported rates), it will automatically configure the clock tree for operation.

    Your operation could look intermittent, as it is possible that the PCM misidentifies the 22.05kHz as 16 or 32kHz and set the clocks for one of those rates, which will impact performance as now critical functions such as the charge pump and DSP are operating at the wrong frequency, but the device might still operate.

    Does the device ever fail to start if you use 44.1kHz?

    Thanks,

    Paul

  • So will the device work at these bitrates with an external sck or not? I don't find a definitive answer in the datasheet. I can either upconvert or clock sck, but I can't change to a different dac.
  • Hi Erik,

    Table 10 shows the supported clock rates.  Unfortunately 22.05kHz is not supported in 4-wire mode as well.  Though it does not help you as you cannot change the DAC, the PCM512x can support this as the clock tree can be manually configured over I2C.  

    Converting the rate to one of the supported rates on table 11 is recommended.