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Tool/software:
Hi Sir,
My customer used PCM5100A in product, they found the PCM5100A does no audio output after it power on, but reset the system and audio output is normal.
They also found the pin-out CAPP and CAPM only 900kHz when the PCM5100A does no audio output, but it is in the audio output normal, both pin-outs have 1.536MHz.
They also captured the waveform for pin-out at 3.3Vcc, BCK, LRCK, XSMT and OUTL and put them in the attached file.
Could you please review the schematics and waveform, and advise some comments. Thanks!
Hi Henry,
Can you confirm that you see the correct Voltage on the Vneg pin? I assume your VNEG is also not working correctly.
Also please provide the clk frequencies. IIt might something is not right with your clks, i have to get more info.
On the schematic, In general it is recommended you provide dedicated decupling caps on each supply pin ( even though you tie the supplies to a common power supply.
If you reset the system and audio works, it is ok. It is not okay if the audio stops working and you have to reset it again and again. So what is the case here?
Please label the various plots of clks that you have in the doc file so I know which conditions each one is for. Thanks,
Arash
Hi Sir,
I updated the some figures on the attachment. Please help review and advise some comments. Thanks!
The customer used the 3-wire I2S audio source. The LRCK is 48kHz, BCK(SCK) is 3.072MHz.
Hello Henry,
From schematics, you are using 3-wire I2S audio but it was mentioned BCK(SCK) is 3.072MHz which implies you are using SCK and thus 4-wire I2S.
For 3-wire I2S, BCK is 3.072MHz ( for 32Bit and 2 Channel), so for 3-wire I2S , clks are ok.
in an unlikely case that schematic is not updated and they are really using 4-wire I2S, make sure table 2. PCM510xA Audio Data Formats, Bit Depths and Clock Rates is meet
Table 10. System Master Clock Inputs for Audio Related Clocks, shows for 48KHz the valid SCK are:
Fs of 48 kHz ==> SCK=6.144, 9.216, 12.288 ,18.432 , 24.576 , 36.864, 49.152 MHz . Note that the slowest SCK can be 6.144MHz.
At the beginning you mentioned when you reset the system it is working fine ; so that by itself tells the IC is working fine when it is initialized correctly .
When the IC is powered up, an internal reset would be triggered ( refer to Figure 41. Power-On Reset Timing, DVDD = 3.3 V), seems the internal reset is not engaging initially, but once the power is reset again it is triggered, that can point out to the initial ramping of the supplies or issue with clks.
Please try it with a controlled ramping of the supplies and also insure from the very beginning your clks are valid and comply with Figure 41
Let me know if still you see an issue.
Regards,
Arash
Hi Sir,
Thank you for your advise.
Refer to the Table 10, and use the 4-wire I2S mode.
In the 128 fs, use the Sampling Frequency=48kHz, the SCK(6.144MHz) only support the PLL mode, it cannot use the external CLK input, right?
Correct! For sampling frequency of 48KHz, , 64x is not supported, the slowest SCK has to be 128x (6.144MHz) and the PLL is disabled as soon as external SCK is supplied.
Regards,
Arash
Hi Sir,
Could you advise the rise time for 3.3V power?
The customer adjust to about 11ms for 0V rise to 2.8V, for the 3-wire I2S mode(test conditions are same), they still found PCM5100A has the no audio output issue.
Hello Henry,
11ms should be more than enough.
So I understand that now they are using 4 wire I2S with correct SCK which is 6.144MHz not the 3.07MHz they were using originally.
From plots, XSMT is always HIGH so it should be ok. Also I assume their clk is valid all the time so the 4ms initialization time is met . At this point I would suggest to remove any connection to the output of the DAC ( at most only leave a simple and basic RC filter as shown in figure 33. N, remove R499 and R450m as well)
PCM510x family is very simple and HW control so it should not be difficult to find the issue.
Regards,
Arash
Hi
Today is a U.S. holiday so our engineers in the U.S. will get back to you no later than tomorrow.
Thank you for your patience,
Jeff McPherson
Hi Henry,
Have they power up first and then apply VALID I2S clks and see the result? I not sure they have looked at this case yet.
Just to confirms again, they have checked with the following 2 cases and the output comes out in both cases ONLY when they reset the power supply.
1) 3-wire I2S with fs=48KHZ, and BCK of 3.072 MHz ( CORRECTION)
2) 4-wire I2S with SCK (system/master clk) of 6.144MHz -which disables the internal PLL,
If the above statements are correct and mute is not triggered, I need to test the IC on my board myself and verify the observation. As I said, this this a very simple part, once the clks are valid and supply is above 2.8V , it should reset itself and generate the output
My last comment before sending the part to me is to try one more time and plot the case when there is no Vout vs when they reset the supply voltage and Vout appears, Plot Supply as well as I2S and Vout
Regards,
Arash
Hi Sir,
The customer taken the PCM5100EVM to do the test and got the same result, please refer to the attachment.
test condition: used 3-wire I2S with fs=48KHZ, and BCK of 1.536 or 3.072 MHz.
Hi Henry,
If with EVM still they have a problem, that clearly points to signals/supply issue and not the IC itself or the board.
I will do the test on the EVM myself and will share some photos of jumber and wire set up as well as some plots.
Meanwhile can they power up the offical EVM in the picture using the USB just to make sure the correct supplies are available on the EVM.
Just a quick correction, with fs=48KHZ,the BCK should be 3.072 MHz ( for 2 channel 32bit ) as I mentioned in my original post, and 1.536MHz should not be used for this configuration.
Regards,
Arash
Hi Henry, I tested the EVM and attached please find the set up photo and result and the AP set up to show my set up as well as I2S configuration.
Note I did the test with 3 wire I2S as well as 4 wire I2S and in both cases I am getting a nice reconstructed sinewave. I tried at different freqency and all showed the expected waveforms.
It is good idea to start from EVM and get it to work standalone, once it is working then they can apply the same signals to the other board. I close the thread but feel free to add any question you might have and i will answer it.
Arash