TINA/Spice/DRV632EVM: Phase Margin

Sadanori Kato

Part Number: DRV632EVM
Other Parts Discussed in Thread: TINA-TI, , DRV632, OPA1611

Tool/software: TINA-TI or Spice Models

Hi,

The result of an open loop analysis which is simulated with TINA-TI using DRV632EVM schematic is shown as below , it seems that the phase margin is approximately 35.2 degree.
Is it reasonable as a phase margin ?
Please let me know if there is an error in the simulation method.
In addition, the phase margin is approximately 85.5 degree if modifying R20 from 33ohm to 0ohm, so should R20 be removed ?

DRV632_Open_Loop_AC.tsc

Best regards,
Kato

over 5 years ago

0 Ivan Salazar over 5 years ago

TI__Guru** 102045 points

Hi Kato-san,

There is a previous post about model accuracy for stability analysis on this device: e2e.ti.com/.../719213
At the end of that post, there is a PDF file with comparison between SPICE model and Design Database.

Best regards,
-Ivan Salazar
Applications Engineer - Low Power Audio & Actuators

0 Sadanori Kato over 5 years ago in reply to Ivan Salazar

Guru 36530 points

Hi Ivan-san,

Thank you for the information.

Unfortunately, I cannot access a pdf file, so could you please share me this file again ?

Best regards,
Kato

0 Ivan Salazar over 5 years ago in reply to Sadanori Kato

TI__Guru** 102045 points

Kato-san,

Please find attached the PDF file.

Best regards,
-Ivan Salazar
Applications Engineer - Low Power Audio & Actuators

4456.OpenLoopGain600R200pF.pdf

0 Sadanori Kato over 5 years ago in reply to Ivan Salazar

Guru 36530 points

Hi Ivan-san,

Thank you for your quick response.

I got it, so I understood that there is the difference between the cadence design model and TINA-TI model regarding the phase margin.
Could you please tell me how to adjust the phase margin in detail as DRV632 is used as an attenuator (e.g. -6dB) ?

Best regards,
Kato

0 Sadanori Kato over 5 years ago in reply to Sadanori Kato

Guru 36530 points

Hi Ivan-san,

Sorry for rushing you but please let me know if you have any updates.

Best regards,
Kato

0 Sadanori Kato over 5 years ago in reply to Sadanori Kato

Guru 36530 points

Hi Ivan-san,

The probing point was also wrong for the above schematic, I attached the updated file.
However, the value of OPA1611 for the input impedance is applied.
Is there a way to verify the phase margin except using TINA-TI model ?

4341.DRV632_Open_Loop_AC.tsc

Best regards,
Kato

0 Ivan Salazar over 5 years ago in reply to Sadanori Kato

TI__Guru** 102045 points

Hi Katon-san,

Could you please clarify what is specifically needed here?
You want to know the phase margin of a specific device configuration?

Best regards,
-ivan Salazar
Applications Engineer - Low Power Audio & Actuators

0 Sadanori Kato over 5 years ago in reply to Ivan Salazar

Guru 36530 points

Hi Ivan-san,

Thank you for your support.

Could you please verify the phase margin for the following schematics ?
Then, one is a narrow band based on the DRV632EVM schematic and the other is a wide band.
It is assumed that these are connected to audio equipment etc with the RCA audio cables.