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Original question:

TAS2505 Power up

TAS2505-Q1: IOVDD power up sequence

Mochi
Genius 4165 points
Part Number: TAS2505-Q1
Other Parts Discussed in Thread: LP5907, TPS22965

Hello, 

Our customer is facing the issue of internal LDO malfunction when IOVDD ramp up is slow as below captured image.

AVDD=LDO out is only 0.8V. This phenomena is occurred at 50% of their engineering sample products.

Found workaround is that using quicker ramp up IOVDD power supply. Then LDO is worked correctly as following captured image.

Do you have any ramping up time constant requirement for IOVDD supply?
Or are those TAS2505-Q1 damaged ?

Regards,

Mochizuki

  • 0
    TI__Guru** 110105 points
    Hi Mochizuki-san,

    Internal LDO is powered by SPKVDD. And it is also enabled by LDO_SEL pin.
    However LDO_SEL signal as a digital pin needs IOVDD to be sensed by the device. Perhaps the slow rising of IOVDD causes LDO_SEL to not be sensed correctly thus internal LDO is not properly powered up.

    You can keep the faster IOVDD ramp up workaround.
    You can also try the following two options that could work (it would need to be tested though):
    - Connect LDO_SEL pin to IOVDD instead of SPKVDD
    - Add some delay between SPKVDD and IOVDD ramp up. Ramp up IOVDD until SPKVDD is completely powered up

    Best regards,
    -Ivan Salazar
    Applications Engineer - Low Power Audio & Actuators
  • 0 in reply to Ivan Salazar
    Genius 4165 points

    Ivan-san,

     

    Thank you for your suggestion.

    Our customer has modified connection of LDO_SEL to SPKVDD.

    However result is not changed.

    I will get their ES sample board and look into more detail of IOVDD timing condition.

     

    Regards,

    Mochizuki

  • 0 in reply to Mochi
    Genius 4165 points

    Ivan-san,

    We have confirmed 1.8V LDO latch up phenomenon on ES board.

    AVdd cap is 22uF and DVdd cap is 10uF MLCC.

    We can see when IOVdd voltage is discharging around 0.8V then AVdd LDO latch up is cleared.

    Father more, if we add 100Kohm extra resistor between AVdd pin to GND. This load draw only 18uA extra current for 50mA LDO but it helps very much to bring in to latched up status. Why this internal LDO is so unstable?

    Could you try to duplicate this issue?

    Regards,

    Mochziuki

  • 0 in reply to Mochi
    TI__Guru** 110105 points
    Hi Mochizuki-san,

    Unfortunately it seems that LDO has latch issues when supplies ramp at the same time.
    As pointed out on previous posts, powering IOVDD after SPKVDD is usually good for LDO power up.

    Best regards,
    -Ivan Salazar
    Applications Engineer - Low Power Audio & Actuators
  • 0 in reply to Ivan Salazar
    Genius 4165 points

    Hello Ivan-san,

    Actually when IOVdd ramp is delayed 500usec by slow ramp TLV73333 LDO after SPKVdd ramp up then internal 1.8V LDO is latched.

    And if use quick ramp LOD like LP5907, internal LDO is not latched as second screenshot of my first message.

    Strange thing is that if I add long delay 45msec for IOVdd, internal LDO is worked well.

    On the datasheet described "For stability reasons the LDO requires a minimum decoupling capacitor of 1 μF (±50%) on the analog supply (AVDD) pin and the digital supply (DVDD) pin."

    Would you contact to design team to get latch up mechanism explanation by showing internal equivalent circuit of the LDO?

    Our customer wants to have concrete workaround in this USB Vbus direct connection application.

    It would be followings, How is your suggestion?

    1. Adding external 1.8V LDO, not activate internal 1.8V LDO.

    2. Adding Load switch like TPS22965 to Vbus for slowing down SPKVdd ramp speed.

    I can expect it will be very difficult to characterize IOVdd and SPKVdd ramp up sequence specification from now.

    But is there any chance to request this task because we are seeing issue in real application.

    Regards,

    Mochizuki

  • 0 in reply to Mochi
    TI__Guru** 110105 points
    Mochizuki-san,

    I will do several tests and try to get details on the design so we can provide a detailed guide on startup sequence for internal LDO, although this might take some time.

    For this occassion, I would suggest to use fast ramp for both SPKVDD and IOVDD, as this seems to work OK from your tests.
    Another option would be to supply IOVDD from the internal LDO as well, so AVDD, DVDD and IOVDD are connected to each other. However this could only be an option if your MCU can also work from 1.8V.

    Best regards,
    -Ivan Salazar
    Applications Engineer - Low Power Audio & Actuators
  • 0 in reply to Ivan Salazar
    TI__Guru** 110105 points
    Hi Mochizuki-san,

    Are the above suggestions OK for your system?
    As explained before, I'll be performing several tests on the device to determine good practice on LDO startup. Once that is complete we'll release a document with that information and update our device documentation as needed.

    Best regards,
    -Ivan Salazar
    Applications Engineer - Low Power Audio & Actuators
  • 0 in reply to Ivan Salazar
    Genius 4165 points
    Hi Ivan-san,
    Our customer will approach Pre-Production stage, they want to apply safer workaround.
    This time they plan to change 3.3V LDO from TLV73333 to TLV70733 to accelerate ramp up time of IOVDD, which is following USB-VBUS direct connected SPKVdd rapid ramping up.
    And added one more external LDO for 1.8V AVDD and DVDD because their system is required 3.3V IOVDD.
    Those might lid the latch up issue.