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PCMD3180: PCMD3180

Part Number: PCMD3180

Hi Sir,

Would you pls kindly help wuation as below about PDM to I2S?

1. PDM input 8 channels=4*L/R channels,

How many channels I2S data can be transfer to o/p? I see it only 1*I2S o/p.

2. If below means transfer Left channel- Slot0, Slot2, Slot3 data(no Slot1?) and then transfer Right channel?

Thanks, Ian.

  • Hi Ian,

    1.)  If using 8-Dmics, then all of the other GPIO/GPO pins will be used for D-Mics other than GPIO1.  One of the configuration options for GPIO1 is to configure it as a second SDOUT pin:

    Table 67. GPIO_CFG0 Register Field Descriptions

    3d = GPIO1 is configured as a secondary ASI output (SDOUT2)

    If you're not using all 8 D-Mics then there will be another GPO output that could also be configured as an SDOUT pin.

    2.) There is a slight error in that drawing and basically there can be up to four channels (slots) of data in the "L" frame and four other channels (slots) of data in the "R" frame.  The slotting assignments are configured in the slot assignment registers. 

  • Hi Collin,

    1. Is it means max. o/p is 2*I2S?

    2. How can it o/p total 8 ch. data?

    Thanks, Ian.

  • Hi Ian,

    1.)  With all of the other GPO's used for D-Mic functions, yes there are only 2x SDOUT pins available (SDOUT + GPIO1). 

    2.)  The device can output 8 channels in several ways using the single SDOUT pin in modified 4x4channel I2S mode, or an 8xdrop TDM bus.  The device could also use the second SDOUT to split off some of the channels in any combination from the first SDOUT bus. 

    The modified 4x4 slot I2S is not always accepted by the host processor and if it only knows how to interpret standard 2-channel I2S, then they should look into using the TDM option to allow for higher-channel counts on a single-bus.