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Original question:

PCM1860-Q1: Power Sequence

PCM1860-Q1: Analog input question

Takuma Ito
Expert 5200 points
Part Number: PCM1860-Q1

1. Is it ok to apply audio signal to the VIN when device is not powered up?  no damage to the device?

2. what is input impedance of analog input ? typ is 20kohm but what is min-max?

3.  what is tolerance of internal bias voltage at analog input? typ is AVDD/2. 

4. this is not question about analog input though. 

- what is VIH min and VIL max for digital input?

- what is VOH min and VOL max for digital input? 

  • 0
    TI__Mastermind 23050 points

    Hi Takuma,

    It is not generally recommended to apply signals to the input of an unpowered device as this has the potential to bias the device through the input and cause abnormal behavior. I would not expect damage to occur though if the signal is within the abs max limits.

    We don't have min/max specs for input impedance but generally this can vary up to +/-25%.

    I don't have tolerance information on the internal bias voltage. 

    Digital signal levels for input and output are 30% of IOVDD max for low level and 70% of IOVDD min for high level.

    Best,

    Zak

  • 0 in reply to Zak Kaye
    TI__Expert 5200 points

    hello Zak

    some additional questions,

    1. In the EC table, the full scale single ended input is 2.1Vrms. So peak to peak 2.96V.  since bias voltage is 3.3V/2=1.65V, the input swing can be -1.31V to 4.61V, is that correct? Within this range, the sound will not clip? 

    2. Also, the abs max says input is -1.5V to 5.0V. Within this limit, the device maybe clip, but no damage, correct? 

    3. for MD pins, is pull-down resistors required externally? is it ok to place bypass caps to enhance noise immunity? 

    4. for MD pins, when is the mode sampled? at start up only, or device reflects the setting on-the-fly? 

    5. coupling cap for single ended input is specified to 10uF, but is it ok to reduce it to 0.1uF? the purpose is to remove low frequency sound (not needed) and reduce settling time of bias voltage. Any issue?

  • 0 in reply to Takuma Ito
    TI__Mastermind 23050 points

    Hi Takuma,

    Your understanding of 1 and 2 is correct but just keep in mind that the variation in offset and gain error between means there will be slight differences in when exactly the input clips between devices.

    The decimation filter setting is the only hardware setting that requires a reset and is sampled on startup, gain/mux and format pins can be changed on the fly.

    It is okay to reduce AC coupling capacitance but if you do I would recommend using C0G/NP0 caps to reduce the amount of low frequency distortion introduced as distortion peaks at the filter cutoff frequency.

    Best,

    Zak

  • 0 in reply to Zak Kaye
    TI__Expert 5200 points

    hello Zak

    thanks.  how about this? please tell me how to fix the logic level? need pull down resistors or not. 

    3. for MD pins, is pull-down resistors required externally? is it ok to place bypass caps to enhance noise immunity? 

  • 0 in reply to Takuma Ito
    TI__Mastermind 23050 points

    Hey Takuma, 

    Pull-down resistors are not necessary.

    Best,

    Zak

  • 0 in reply to Zak Kaye
    TI__Expert 5200 points

    hello Zak

    Is the analog input voltage full-scale range of 2.1Vrms dependent on AVDD? or does it scale with AVDD?

  • 0 in reply to Takuma Ito
    TI__Mastermind 23050 points

    Hi Takuma,

    The analog input range is dependent on VREF, which is typically 0.5AVDD so the range will change a bit depending on AVDD.

    Best,

    Zak

  • 0 in reply to Zak Kaye
    TI__Expert 5200 points

    hello Zak

     could you tell me how to know input range at certain AVDD? Is it just proportional to VREF?

  • 0 in reply to Takuma Ito
    TI__Mastermind 23050 points

    Hey Takuma,

    Yes it is proportional to VREF. The device does not have a very wide AVDD range supported though and I would recommend operating at 3.3V rather than near the limits.

    Best,

    Zak