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Original question:

PCM6340-Q1: TX_LSB setting

PCM6340-Q1: Bus Keeper

Shinji Tsuji
Genius 12978 points
Part Number: PCM6340-Q1

Hi team,

Could you explain the exact behavior and purpose of the Bus Keeper function more in detail than which is described in SBAA415.pdf?

Does it hold the SDOUT to the last value (LSB=High or Low) to avoid floating the output?

I don't understand the example below.

"For example, the LSB of U2 could be set to transmit on the first half of the bit clock cycle,
while the MSB of U3 is driving without any offset. Moreover, selecting TX_KEEPER value of 0x2 or 0x3
adds robustness to the system by ensuring the LSB is latched properly by the host processor, since buskeepers
continue holding the bus with the last value driven."

regards,

  • 0
    TI__Mastermind 23050 points

    Hi Shinji-san,

    This is a feature that is common to many ICs and is sometimes referred to as "Bus Holder" as well. Yes the intention is to avoid floating the output and keeping the bus in a known state driven either high or low to avoid the possibility of the bus floating to a crossover point in receiver circuitry in order to minimize power consumption. The bus keeper ensures the bus is weakly driven to the last state. It can then be overridden once another device is ready to transmit data on the bust. The TX_LSB bit defines how long the LSB is actively driven before deferring to the bus keeper setting. The bus keeper can be set to always on or to only hold the bus in the last known state for 1 or 1.5 cycles.

    Best,

    Zak