TLV320AIC3254 & ADC performance in 192KHz

Christos Nikolaou12204

Other Parts Discussed in Thread: TLV320AIC3254

Hi,

I have a new design and attached are two codecs TLV320AIC3254.

The purpose of one of the AIC3254 codecs is to be able to sample and measure incoming frequencies above the plain audio spectrum and up to samplerate/2 (according to Nyquist).

Based on the AIC3254 datasheet it can have a samplerate of up to 192KHz.

I've managed to configure the AIC3254 in 32bit/192KHz (PRB_R13, PRB_P17)

I have two questions though,

1. if the AIC3254 can indeed listen any signal above 24KHz, or is there any anti-alias filter hardwired in the ADC path even if I do not place one?

2. is there any chart displaying the codec/ADC performance in higher than 24KHz frequency range?

Christos

over 14 years ago

0 J- over 14 years ago

TI__Mastermind 46195 points

Hello Christos,

See attached zip file setup and FFT / Freq plots running at 192ksps with wide bandwidth.

The anti-alias is at a much higher frequency. Aliasing is typically not an issue because the actual ADC sample rate is typically around 6MHz (depends on OSR settings). We do have an internal LPF to take care of that (20dB atten. @ 1MHz).

When working with 192ksps, Filter C should be used, but this limits the bandwidth. You could use Filter B, but with -24dB gain error, which can be fixed with the attached procedure.

Regards,

J-

AIC3254_4x2x_192ksps_Setup.zip

0 Christos Nikolaou12204 over 14 years ago in reply to J-

Expert 1790 points

Hi J,

Thank you for the precise answer.

The answer though sparked a couple of questions as always.

1. I'm not in need of the 24dB compensation so I assume that I can just leave out the miniDSP procedure, right?

Either way from the graph is shown that the noise floor is also elevated so its dynamic range remains exactly the same.

2. Are these a prerequisite

# 4x Interpolation
w 30 11 04
#
# 2x Decimation
w 30 17 02
#
for the extended bandwidth? The datasheet mentions that the miniDSP should be enabled for these to work yet that is not enabled in the AIC3254_4x2x_192ksps_Patch.cfg

3. I will select the B filter based on the processing block selection, so I'll choose PRB_R7/PRB_P7 and AOSR 32, regardless of the table 5-4, right?

4. Can this extended bandwidth coverage happen with the AIC3204 too?

Christos

0 J- over 14 years ago in reply to Christos Nikolaou12204

TI__Mastermind 46195 points

1. I'm not in need of the 24dB compensation so I assume that I can just leave out the miniDSP procedure, right?

Either way from the graph is shown that the noise floor is also elevated so its dynamic range remains exactly the same.

- You can keep gain error at -24dB, or add 20dB of digital ADC PGA gain. Gain error does not affect SNR much even after gaining up due to large internal word length.

2. Are these a prerequisite

- In AIC3204 and PRB modes, this setting is ignored.

3. I will select the B filter based on the processing block selection, so I'll choose PRB_R7/PRB_P7 and AOSR 32, regardless of the table 5-4, right?

- Correct.

4. Can this extended bandwidth coverage happen with the AIC3204 too?

- Yes, by doing #3.

Regards,

J-

0 Christos Nikolaou12204 over 14 years ago in reply to J-

Expert 1790 points

Thanks J,

Christos

0 Dev over 14 years ago in reply to J-

Prodigy 20 points

Hi I tried to open the process flow file with Pure Path Studio, gives I/O error, please check the file and repost.

Thanks

Varma

0 J- over 14 years ago in reply to Dev

TI__Mastermind 46195 points

Hi Varma,

I tested the pfw with the newest PPS and did not see any issues.

I saved it again and re-posted it below:

Regards,

J-

1817.AIC3254_4x2x_192ksps_Setup.zip

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TLV320AIC3254 & ADC performance in 192KHz