NE555: CMOS or TTL?

user4173409

Part Number: NE555
Other Parts Discussed in Thread: TLC555, SA555, LM555, LMC555

At present, when using ne555 to drive MOS behind the small power LED, using switching power supply, ne555 works normally, put on the battery (lithium battery / carbonic acid) battery voltage test 13.5v. This time has been powered and the battery voltage will be down to 1v, off Turn on the battery voltage measurement, or 13,5v, disconnect the battery on the foot, the battery voltage is normal, please help confirm what is the reason Is ne555 CMOS or ttl? When reading 5v input, it is written as ttl level. Please help confirm whether the wide voltage input is cmos. Is the internal integrated transistor just ttl level? Both power modes are normal using tlc555

over 5 years ago

0 Paul Goedeke over 5 years ago

TI__Mastermind 30600 points

Hi User,

This is an English forum, I translated your question and I think have a basic understanding of it. Please reply in English if you'd like continued support.

The NE555 is bipolar, not CMOS. Can you clarify what issue you are seeing?

-Paul

0 user4173409 over 5 years ago in reply to Paul Goedeke

Prodigy 160 points

Can NE555 TTL level support wide voltage input? Normal TTL level supports 5V.

The main problem is that when the battery is powered, the battery voltage will be lowered. Please confirm it.

The following is the schematic diagram. Please check it.

0 Ron Michallick over 5 years ago in reply to user4173409

TI__Guru*** 139956 points

Hi user,

The trigger and threshold inputs are comparator inputs with the the other comparator inputs based on the voltage at the COMP pin. See section 8.2 of data sheet. The minimum recommended Vcc for NE555 is 4.5V. Below that voltage, it may not work correctly.

0 user4173409 over 5 years ago in reply to Ron Michallick

Prodigy 160 points

When the battery voltage is 13.5 V, NE555 will produce a large surge current-30A, resulting in battery protection, so there is no output, Why is this happening?
The battery voltage measured separately is 13.5 v.
Replacement of TLC 555. All clear.

0 Ron Michallick over 5 years ago in reply to user4173409

TI__Guru*** 139956 points

I see the current pulse but the current is not one of the NE555 pin signals.
What happens at the NE555 pins?

NE555 follows these rules.
1 If reset is low then output is low and ignore all other rules.
2 If trigger is low (<1/2 CONTROL) then output is high and ignore rules 3 & 4
3 If threshold is high (>CONTROL) then output is low and ignore rule 4
4 Output does not change.

0 user4173409 over 5 years ago in reply to Ron Michallick

Prodigy 160 points

When we replace TLC555, there is no current pulse.

After power on, the current pulse is too large, resulting in battery protection, no voltage output

0 Ron Michallick over 5 years ago in reply to user4173409

TI__Guru*** 139956 points

Are you using the RESET function to delay output until power is stable? If not, then power up might be different for NE555 and TLC555.
It seems that TLC555 has a power up profile that works better in your system.

0 user4173409 over 5 years ago in reply to Ron Michallick

Prodigy 160 points

Thank you for your answer. The problem has been solved.

However, it was found that the first PWM waveform of the NE555 is very wide and the width of the waveform behind it is not the same. Is it related to the capacitance added to the 5th pin?
Is the CMOS and TTL foot 5 matched capacitors different? We're using a 10NF capacitor.

0 user4173409 over 5 years ago in reply to user4173409

Prodigy 160 points

The SA555 used five prototype tests and found that the frequencies were inconsistent. The ratio of off to space was different. Each chip performed different frequencies, leading to a consistent ratio of air to space.

0 user4173409 over 5 years ago in reply to user4173409

Prodigy 160 points

ANY UPDATE?

0 Ron Michallick over 5 years ago in reply to user4173409

TI__Guru*** 139956 points

The first pulse can be longer because the timing capacitor normally starts from 0V and the second pulse (In a-stable mode) starts at 33% of VCC. Pulses can be shorter before the capacitor on pin 5 has fully charged. Can you share your 555 timer circuit?

0 user4173409 over 5 years ago in reply to Ron Michallick

Prodigy 160 points

How much is the capacitance of 5 PIN？

0 Ron Michallick over 5 years ago in reply to user4173409

TI__Guru*** 139956 points

It is negligible, probably close to 4pF. Normally there is an external capacitor that sets the capacitance on pin 5.
If a couple picofarads matter then the application frequency is far too high for the NE/NA/SE/SA/LM555 timers.

0 Ron Michallick over 5 years ago in reply to Ron Michallick

TI__Guru*** 139956 points

I can help better, If I knew the components around the timer and if the timer is set up for monostable or a-stable mode.

0 user4173409 over 5 years ago in reply to Ron Michallick

Prodigy 160 points

Frequency is 75K.

0 Ron Michallick over 5 years ago in reply to user4173409

TI__Guru*** 139956 points

75kHz is close to the maximum frequency of NE/NA/SE/SA/LM555 timers. They will run up to 100 kHz however the higher the frequency the more the device to device variance. Above 25 kHz, the simplified frequency formula in the data sheet increases in error because propagation delay becomes a factor which is not included in the formula because that would make it too complex. TLC555 and LMC555 timer have less propagation delay and less varinece at 75 kHz.

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NE555: CMOS or TTL?