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CDCE6214-Q1: Crystal and Loop Filter settings

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Part Number: CDCE6214-Q1

Can you provide equations for calculating IP_XO_CLOAD and IP_BIAS_SEL_XO?

I am using a 25MHz crystal with 8pF load capacitance and 100Ω ESR.  The traces are very short and copper planes are cut out below the crystal.  Routing capacitance should be minimal.

I do not see equations in the data sheet or register map documents.

Also the loop filter settings provided in Table 3 of the data sheet are not labeled the same as the register fields or the selections in TICS Pro.  I think I have decoded most of the settings, but I am still missing R3 and C3.  

I am trying to get fVCO=2500MHz from fPFD=50MHz.

Thanks for any advice.