Hard fault when trying to read the TAV register on GPT0

I apologize for such a general question although I have not used the cortex M3 in over 5 years. I am using a CC1350 as part of the SmartRF06 Eval board and I amtrying to go to sleep for a certain period and wakeup using the GPT0.

Here is what I am following from the documentation:

13.4 Initialization and Configuration
1. To use a GPT module, enable the peripheral domain and the appropriate GPT module in the PRCM by
writing to the PRCM:GPTCLKGR, the PRCM:GPTCLKGS, and the PRCM:GPTCLKGDS registers, or
by using the following driver library functions:
PRCMPeripheralRunEnable(uint32_t, ui32Peripheral)
PRCMPeripheralSleepEnable(uint32_t, ui32Peripheral)
PRCMPeripheralDeepSLeepEnable(uint32_t, ui32Peripheral)
2. Next, load the setting to the clock controller by writing to the PRCM:CLKLOADCTL register.
3. Configure the IOC module to route the output from the GPT module to the IOs.
4. The IOC module must then be configured to output the timer signal on the wanted I/O pin. For this,
IOCFGn.PORTID must be written to the correct PORTIDs (see Chapter 11, I/O Control, for more
details).
The following sections show module initialization and configuration examples for each of the supported
timer modes.
13.4.1 One-shot and Periodic Timer Modes
The GPTM is configured for one-shot and periodic modes by the following sequence:
1. Ensure the timer is disabled (clear the GPT:CTL TnEN register bit) before making any changes.
2. Write the GPTM Configuration Register (GPT:CFG) with a value of 0x0000 0000.
3. Configure the GPTM Timer n Mode Register (GPT:TnMR) TnMR field:
(a) Write a value of 0x1 for one-shot mode.
(b) Write a value of 0x2 for periodic mode.
4. Optionally, configure the GPT:TnMR TnSNAPS, TnWOT, TnMTE, and TnCDIR register bits to select
whether to capture the value of the free-running timer at time-out, use an external trigger to start
counting, configure an additional trigger or interrupt, and count up or down.
5. Load the start value into the GPTM Timer n Interval Load Register (GPT:TnILR).
6. If interrupts are required, set the appropriate bits in the GPTM Interrupt Mask Register (GPT:IMR).
7. Set the GPT:CTL TnEN register bit to enable the timer and start counting.
8. Poll the GPT:MRIS register or wait for the interrupt to be generated (if enabled). In both cases, the
status flags are cleared by writing a 1 to the appropriate bit of the GPTM Interrupt Clear Register
(GPT:ICR).
In one-shot mode, the timer stops counting after the time-out event. To re-enable the timer, repeat the
sequence. A timer configured in periodic mode reloads the timer and continues counting after the time-out
event.

Here is a code snippet and I go into a hard fault when trying to read the TAV register ( as a test to see if counter is running)

  //PRCMInfClockConfigureSet( PRCM_CLOCK_DIV_8 , PRCM_SLEEP_MODE);

  PRCMPeripheralSleepEnable  (   PRCM_PERIPH_TIMER0  );       
 
  PRCMLoadSet();
 
  HWREG(GPT0_CTL) = 0x00000000;  //Disable Timer
  HWREG(GPT0_CFG) = 0x00000000;  //Config to zero
  HWREG(GPT0_TAMR) = 0x00000031; // One Shot count up
  HWREG(GPT0_TAILR) = 0;         // Load Start value
  HWREG(GPT0_TAMATCHR) = 50;         // Load match value
  HWREG(GPT0_IMR) = 0x00000011;
  HWREG(GPT0_CTL) = 0x00000001;

  //PRCMSleep();
 
 
 
  while( Working < 50)
  {
 
    Working = HWREG(GPT0_TAV);
  }

Any help would be appreciated as I am just trying to sample current draw on the eval radio

Thanks,

David